Alfonso Rodríguez

Orcid: 0000-0001-6326-743X

Affiliations:
  • Technical University of Madrid (UPM), CEI, Madrid, Spain


According to our database1, Alfonso Rodríguez authored at least 28 papers between 2014 and 2024.

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Bibliography

2024
Data-driven modeling of reconfigurable multi-accelerator systems under dynamic workloads.
Microprocess. Microsystems, 2024

STRELA: STReaming ELAstic CGRA Accelerator for Embedded Systems.
CoRR, 2024

Open-Source Elastic CGRA Generator.
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024

MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems.
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024

2022
Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.
IEEE Trans. Computers, 2022

Just-In-Time Composition of Reconfigurable Overlays (Invited Talk).
Proceedings of the 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2022

Extending RISC-V Processor Datapaths with Multi-Grain Reconfigurable Overlays.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021
Run-Time Monitoring and ML-Based Modeling in Reconfigurable Multi-Accelerator Systems.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

2020
Exploiting Multi-Level Parallelism for Run-Time Adaptive Inverse Kinematics on Heterogeneous MPSoCs.
IEEE Access, 2020

Run-Time Reconfigurable MPSoC-Based On-Board Processor for Vision-Based Space Navigation.
IEEE Access, 2020

Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019
DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping.
Microprocess. Microsystems, 2019

Scalable Hardware-Based On-Board Processing for Run-Time Adaptive Lossless Hyperspectral Compression.
IEEE Access, 2019

Hardware/Software Self-adaptation in CPS: The CERBERO Project Approach.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Data Transfer Modeling and Optimization in Reconfigurable Multi-Accelerator Systems.
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018
FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo<sup>3</sup> Framework.
Sensors, 2018

A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images.
Remote. Sens., 2018

A Unified Hardware/Software Monitoring Method for Reconfigurable Computing Architectures Using PAPI.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

DEMO: Multi-Grain Adaptivity in Cyber-Physical Systems.
Proceedings of the 30th International Conference on Microelectronics, 2018

2017
Analysis of a heterogeneous multi-core, multi-hw-accelerator-based system designed using PREESM and SDSoC.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

2015
Evolutionary Computing and Particle Filtering: A Hardware-Based Motion Estimation System.
IEEE Trans. Computers, 2015

Execution modeling in self-aware FPGA-based architectures for efficient resource management.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

Design of OpenCL-compatible multithreaded hardware accelerators with dynamic support for embedded FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Live demonstration: A dynamically adaptable image processing application running in an FPGA-based WSN platform.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Dynamic management of multikernel multithread accelerators using Dynamic Partial Reconfiguration.
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

A dynamically adaptable bus architecture for trading-off among performance, consumption and dependability in Cyber-Physical Systems.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014


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