Teresa Riesgo
Orcid: 0000-0003-0532-8681
According to our database1,
Teresa Riesgo
authored at least 92 papers
between 1996 and 2020.
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Bibliography
2020
Towards an Machine Learning-Based Edge Computing Oriented Monitoring System for the Desert Border Surveillance Use Case.
IEEE Access, 2020
2019
A Novel Data Processing Technique for Expert Resonant Nano-Pillars Transducers: A Case Study Measuring Ethanol in Water and Wine Liquid Matrices.
IEEE Access, 2019
Hardware Accelerator for Ethanol Detection in Water Media based on Machine Learning Techniques.
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019
2018
FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo<sup>3</sup> Framework.
Sensors, 2018
Sensors, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Poster: Smart Self-Adaptive Clustering Technique for Collaborative Sensing in IoT Risk Contexts.
Proceedings of the 2018 International Conference on Embedded Wireless Systems and Networks, 2018
Embedded Emotion Recognition within Cyber-Physical Systems using Physiological Signals.
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
2016
Integrated Toolset for WSN Application Planning, Development, Commissioning and Maintenance: The WSN-DPCM ARTEMIS-JU Project.
Sensors, 2016
Microprocess. Microsystems, 2016
J. Real Time Image Process., 2016
2015
Microprocess. Microsystems, 2015
Performance evaluation of an AODV-based routing protocol implementation by using a novel in-field WSN diagnosis tool.
Microprocess. Microsystems, 2015
Multiple feature points representation in target localization of wireless visual sensor networks.
J. Netw. Comput. Appl., 2015
Modelling and planning reliable wireless sensor networks based on multi-objective optimization genetic algorithm with changeable length.
J. Heuristics, 2015
Execution modeling in self-aware FPGA-based architectures for efficient resource management.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
Live demonstration: A dynamically adaptable image processing application running in an FPGA-based WSN platform.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A novel on-site deployment, commissioning and debugging technique to assess and validate WSN based smart systems.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures.
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015
2014
Customized and automated routing repair toolset towards side-channel analysis resistant dual rail logic.
Microprocess. Microsystems, 2014
Radio propagation modeling and real test of ZigBee based indoor wireless sensor networks.
J. Syst. Archit., 2014
Power estimation for intellectual property-based digital systems at the architectural level.
J. King Saud Univ. Comput. Inf. Sci., 2014
Circuits Syst. Signal Process., 2014
Dynamic management of multikernel multithread accelerators using Dynamic Partial Reconfiguration.
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014
A dynamically adaptable bus architecture for trading-off among performance, consumption and dependability in Cyber-Physical Systems.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
A run time adaptive architecture to trade-off performance for fault tolerance applied to a DVB on-board processor.
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014
2013
IEEE Trans. Computers, 2013
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
On-the-fly dynamic reprogramming mechanism for increasing the energy efficiency and supporting multi-experimental capabilities in WSNs.
Proceedings of the IECON 2013, 2013
Proceedings of the IECON 2013, 2013
A self-adaptive image processing application based on evolvable and scalable hardware.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Noise-agnostic adaptive image filtering without training references on an evolvable hardware platform.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
A noise-agnostic self-adaptive image processing application based on evolvable hardware.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
2012
Sensors, 2012
Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling.
Microprocess. Microsystems, 2012
Wireless Sensor Network for Environmental Monitoring: Application in a Coffee Factory.
Int. J. Distributed Sens. Networks, 2012
A hardware in the loop design methodology for FPGA system and its application to complex functions.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Power management techniques in an FPGA-based WSN node for high performance applications.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012
Low-complexity timing synchronization scheme for MB-OFDM UWB receiver based on sign-bit.
Proceedings of the IEEE International Conference on Ultra-Wideband, 2012
Implementation techniques for evolvable HW systems: virtual VS. dynamic reconfiguration.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
An Interleaved EPE-Immune PA-DPL Structure for Resisting Concentrated EM Side Channel Attacks on FPGA Implementation.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2012
2011
Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems.
EURASIP J. Adv. Signal Process., 2011
Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
A Precharge-Absorbed DPL Logic for Reducing Early Propagation Effects on FPGA Implementations.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011
Run-Time Scalable Architecture for Deblocking Filtering in H.264/AVC-SVC Video Codecs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
A fast Reconfigurable 2D HW core architecture on FPGAs for evolvable Self-Adaptive Systems.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors.
Int. J. Distributed Sens. Networks, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
High Level Validation of an Optimization Algorithm for the Implementation of Adaptive Wavelet Transforms in FPGAs.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the Reconfigurable Computing: Architectures, 2010
Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
2009
Reconfigurable Hardware Architecture of a Shape Recognition System Based on Specialized Tiny Neural Networks With Online Training.
IEEE Trans. Ind. Electron., 2009
2008
IEEE Trans. Ind. Electron., 2008
J. Low Power Electron., 2008
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008
Disjoint Region Partitioning for Probabilistic Switching Activity Estimation at Register Transfer Level.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2007
J. Low Power Electron., 2007
Reconfigurable Heterogeneous Communications and Core Reallocation for Dynamic HW Task Management.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2006
J. Univers. Comput. Sci., 2006
J. Univers. Comput. Sci., 2006
Partial Reconfiguration for Core Reallocation and Flexible Communications.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
Power Macromodeling for High Level Power Estimation.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Proceedings of the International Symposium on System-on-Chip, 2006
Power estimation for register transfer level by genetic algorithm.
Proceedings of the ICINCO 2006, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Virtex II FPGA Bitstream Manipulation: Application to Reconfiguration Control Systems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
2005
Straight Method for Reallocation of Complex Cores by Dynamic Reconfiguration in Virtex II FPGAs.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Switching activity propagation of VHDL-RTL combinational designs through an automated tool.
Proceedings of the 12th IEEE International Conference on Electronics, 2005
Flexible Core Reallocation for Virtex II Structures.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005
2004
Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion.
Proceedings of the Field Programmable Logic and Application, 2004
2000
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000
1999
IEEE Trans. Ind. Electron., 1999
1998
Quality Estimation of Test Vectors and Functional Validation Procedures Based on Fault and Error Models.
Proceedings of the 1998 Design, 1998
1996
Proceedings of the conference on European design automation, 1996