Chadi Jabbour

According to our database1, Chadi Jabbour authored at least 37 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Reconfigurable Adaptive Channel Sensing.
IEEE Trans. Green Commun. Netw., September, 2023

A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems.
Sensors, 2023

2022
Foreground Static Error Calibration for Current Sources Using Backgate Body Biasing.
Proceedings of the 7th IEEE Forum on Research and Technologies for Society and Industry Innovation, 2022

2021
Analog Duty Cycle Controller Using Backgate Body Biasing For 5G Millimeter Wave Applications.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020
Wide Frequency Characterization of Intra-Body Communication for Leadless Pacemakers.
IEEE Trans. Biomed. Eng., 2020

2019
Physically-Derived 3-Box Power Amplifier Model.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

2018
FFT-Based Limited Subband Digital Predistortion Technique for Ultra Wideband 5G Systems.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

A Wideband Mixed-Signal Predistorter for Small-Cell Base Station Power Amplifiers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Human Body Communication Channel Characterization for Leadless Cardiac Pacemakers.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
Fully-Digital Blind Compensation of Non-Linear Distortions in Wideband Receivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Fully Digital Feedforward Background Calibration of Clock Skews for Sub-Sampling TIADCs Using the Polyphase Decomposition.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

An FIR memory polynomial predistorter for wideband RF power amplifiers.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Wideband power amplifier predistortion: Trends, challenges and solutions.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
System Design for Direct RF-to-Digital ΔΣ Receiver.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

All-Digital Calibration of Timing Skews for TIADCs Using the Polyphase Decomposition.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A multi-channel ΣΔ modulator for subband digital predistortion with LTE signals.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

A flexible receiver using ΔΣ modulation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A continuous-time direct RF-to-digital ΔΣ receiver.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A CMOS 65nm 120 dB Stacked A/D converters receiver for long wavelength radio astronomy observations.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Estimation techniques for timing mismatch in time-interleaved analog-to-digital converters: Limitations and solutions.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
Hardware implementation of all digital calibration for undersampling TIADCs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Adaptive digital pre-distortion for future wireless transmitters.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014
Delay-Reduction Technique for DWA Algorithms.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A flexible direct delta-sigma receiver for GSM/WCDMA/LTE.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

A fully digital background calibration of timing skew in undersampling TI-ADC.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Performance study of nonlinearities blind correction in wideband receivers.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
A novel dynamic element matching technique suited for high pass ΔΣ ADCs.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Direct delta-sigma receiver: Analysis, modelization and simulation.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A low power RC time constant auto-tuning circuit for RC-integrators in high linearity continuous-time delta sigma modulators.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

2011
A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

High pass filter implementation comparison in unity STF high pass ΔΣ modulator.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

High-pass or low-pass ΣΔ modulators?
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

A novel design methodology for multiplierless filters applied on ΔΣ decimators.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
A technique to reduce the impact of hysterisys in ΣΔ analog to digital converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A new interpolation technique for TI ΣΔ A/D converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A 1 V 65 nm CMOS Reconfigurable Time Interleaved High Pass SigmaDelta ADC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009


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