Vason P. Srini

According to our database1, Vason P. Srini authored at least 28 papers between 1975 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Adaptive digital pre-distortion for future wireless transmitters.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2008
An Effective Load Balancing Scheme for 3D Texture-Based Sort-Last Parallel Volume Rendering on GPU Clusters.
IEICE Trans. Inf. Syst., 2008

2007
Dynamic power management of DRAM using accessed physical addresses.
Microprocess. Microsystems, 2007

Simulation and development environment for mobile 3D graphics architectures.
IET Comput. Digit. Tech., 2007

2006
A Vision for Supporting Autonomous Navigation in Urban Environments.
Computer, 2006

A framework for supporting autonomous navigation in automobiles.
Proceedings of the Fourth IEEE Workshop on Software Technologies for Future Embedded and Ubiquitous Systems and the Second International Workshop on Collaborative Computing, 2006

Distributed Real-time Computing in Autonomous Robots using Time-Triggered and Message-Triggered Objects (TMOs).
Proceedings of the Ninth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2006), 2006

2005
Implementation of New Services to Support Ubiquitous Computing for Town Life.
Proceedings of the Third IEEE Workshop on Software Technologies for Future Embedded and Ubiquitous Systems, 2005

1998
A Multiprocessor DSP System Using PADDI-2.
Proceedings of the 35th Conference on Design Automation, 1998

1997
Design and Simulation of the Aquarius-II Multiprocessor.
J. Syst. Integr., 1997

1995
DFS-SuperMPx: Low-cost Parallel Processing System for Machine Vision and Image Processing.
Proceedings of the Parallel Computing Technologies, 1995

1992
Field Programmable Gate Array (FPGA) Implementation of Digital Systems: An Alternative to ASIC.
Proceedings of the Fifth International Conference on VLSI Design, 1992

1990
The Aquarius IIU System.
Proceedings of the First International Conference on Systems Integration, 1990

System Integration of the VLSI-PLM Chip.
Proceedings of the First International Conference on Systems Integration, 1990

1988
A two-tier memory architecture for high-performance multiprocessor systems.
Proceedings of the 2nd international conference on Supercomputing, 1988

1987
Aquarius.
SIGARCH Comput. Archit. News, 1987

1986
An Architectural Comparison of Dataflow Systems.
Computer, 1986

1985
A Fault-Tolerant Dataflow System.
Computer, 1985

Compiling Prolog into microcode: a case study using the NCR/32-000.
Proceedings of the 18th annual workshop on Microprogramming, 1985

1984
A methodology for designing and modeling reconfigurable systems.
Int. J. Parallel Program., 1984

Node Reassignment in a Dataflow System.
Proceedings of the 4th International Conference on Distributed Computing Systems, 1984

1983
Analysis of Cray-1S Architecture
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983

1981
An Architecture for Extended Abstract Data Flow.
Proceedings of the 8th Annual Symposium on Computer Architecture, 1981

1979
Iterative Realization of Multivalued Logic Systems.
IEEE Trans. Computers, 1979

1978
Fault Location in a Semiconductor Random-Access Memory Unit.
IEEE Trans. Computers, 1978

1977
API Tests for RAM Chips.
Computer, 1977

Special Feature: Fault Diagnosis of Microprocessor Systems.
Computer, 1977

1975
Realization of Fuzzy Forms.
IEEE Trans. Computers, 1975


  Loading...