Chanyoung Jeong
According to our database1,
Chanyoung Jeong
authored at least 3 papers
between 2019 and 2024.
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Bibliography
2024
A 45-fsrms Accumulated Jitter PLL Using Advanced Design Techniques for PCIe Gen6 Reference Clock Generation in 2 nm MBCFET Technology.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024
2022
Clock Generator with IS026262 ASIL-D Grade Safety Mechanism for SoC Clocking Application.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2019
An Early Prediction on Mild Cognitive Impairment using Point-to-point Reaching Task in a Virtual Reality.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019