Chao Chen

According to our database, Chao Chen authored at least 23 papers between 2013 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Tensor Manipulation Unit (TMU): Reconfigurable, Near-Memory Tensor Manipulation for High-Throughput AI SoC.

Weiyu Zhou, Zheng Wang, Chao Chen, Yike Li, Yongkui Yang, Zhuoyu Wu, Anupam Chattopadhyay

CoRR, June, 2025

Constants of motion network revisited.

Wenqi Fang, Chao Chen, Yongkui Yang, Zheng Wang

CoRR, April, 2025

Swift: Fast Performance Tuning with GAN-Generated Configurations.

Chao Chen, Shixin Huang, Xuehai Qian, Zhibin Yu

Proceedings of the 2025 USENIX Annual Technical Conference, 2025

AttenPU: An Area Efficient Attention Processor with Reconfigurable FP8 Precision and Dataflow.

Qiawei Zheng, Pu Zhou, Zheng Wang, Zhuoyu Wu, Yike Li, Zhihao Du, Chao Chen, Yongkui Yang, Wenqi Fang, Anupam Chattopadhyay

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

2024

TIE: Fast Experiment-Driven ML-Based Configuration Tuning for In-Memory Data Analytics.

Chao Chen, Jinhan Xin, Zhibin Yu

IEEE Trans. Computers, May, 2024

AnchorCapsule: A Datastream-Serving Post-Processor for Object Detection in Embedded Vision SoC.

Yi Peng, Yongkui Yang, Zheng Wang, Chao Chen

IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

Harmonizing Unets: Attention Fusion module in cascaded-Unets for low-quality OCT image fluid segmentation.

Zhuoyu Wu, Qinchen Wu, Wenqi Fang, Wenhui Ou, Quanjun Wang, Linde Zhang, Chao Chen, Zheng Wang, Heshan Li

Comput. Biol. Medicine, 2024

Low-latency Buffering for Mixed-precision Neural Network Accelerator with MulTAP and FQPipe.

Yike Li, Zheng Wang, Wenhui Ou, Chen Liang, Weiyu Zhou, Yongkui Yang, Chao Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

PerFT-N: Low-overhead Permanent Fault-Tolerance Mechanism for Neural Processing Units.

Haojie Jian, Chao Chen, Zheng Wang, Pengfei Wu

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023

COMPACT: Co-processor for Multi-mode Precision-adjustable Non-linear Activation Functions.

Wenhui Ou, Zhuoyu Wu, Zheng Wang, Chao Chen, Yongkui Yang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

A Dynamic Opposite Learning-Assisted Grey Wolf Optimizer.

Yang Wang, Chengyu Jin, Qiang Li, Tianyu Hu, Yunlang Xu, Chao Chen, Yuqian Zhang, Zhile Yang

Symmetry, 2022

An Energy-Efficient Method for Recurrent Neural Network Inference in Edge Cloud Computing.

Chao Chen, Weiyu Guo, Zheng Wang, Yongkui Yang, Zhuoyu Wu, Guannan Li

Symmetry, 2022

2021

sEMG-Based Gesture Recognition Using GRU With Strong Robustness Against Forearm Posture.

Rui Chen, YuanZhi Chen, Weiyu Guo, Chao Chen, Zheng Wang, Yongkui Yang

Proceedings of the IEEE International Conference on Real-time Computing and Robotics, 2021

CNN-DMA: A Predictable and Scalable Direct Memory Access Engine for Convolutional Neural Network with Sliding-window Filtering.

Zheng Wang, Zhuo Wang, Jian Liao, Chao Chen, Yongkui Yang, Bo Dong, Weiguang Chen, Wenxuan Chen, Ming Lei, Weiyu Guo, Rui Chen, Yi Peng, Zhibin Yu

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

OR-ML: Enhancing Reliability for Machine Learning Accelerator with Opportunistic Redundancy.

Bo Dong, Zheng Wang, Wenxuan Chen, Chao Chen, Yongkui Yang, Zhibin Yu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Highly-accurate gesture recognition based on ResNet with low-budget data gloves.

Hongrui Min, Chao Chen, Shixin Huang, Xiaorui Tian, Yongkui Yang, Zheng Wang

Proceedings of the AISS 2021: 3rd International Conference on Advanced Information Science and System, Sanya, China, November 26, 2021

Improving system latency of AI accelerator with on-chip pipelined activation preprocessing and multi-mode batch inference.

Wenxuan Chen, Zheng Wang, Ming Lei, Bo Dong, Zhuo Wang, Yongkui Yang, Chao Chen, Weiyu Guo, Chen Liang, Qian Zhang, Wenqi Fang, Zhibin Yu

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020

Accelerating Atrous Convolution with Fetch-and-Jump Architecture for Activation Positioning.

Zhuo Wang, Zheng Wang, Bo Dong, Chao Chen, Yongkui Yang, Zhibin Yu

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

BBS: Micro-Architecture Benchmarking Blockchain Systems through Machine Learning and Fuzzy Set.

Liang Zhu, Chao Chen, Zihao Su, Weiguang Chen, Tao Li, Zhibin Yu

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

On the Auto-Tuning of Elastic-search based on Machine Learning.

Zhenyan Lu, Chao Chen, Jinhan Xin, Zhibin Yu

Proceedings of the CCRIS 2020: International Conference on Control, 2020

2014

System-level reliability exploration framework for heterogeneous MPSoC.

Zheng Wang, Chao Chen, Piyush Sharma, Anupam Chattopadhyay

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013

Fast reliability exploration for embedded processors via high-level fault injection.

Zheng Wang, Chao Chen, Anupam Chattopadhyay

Proceedings of the International Symposium on Quality Electronic Design, 2013

Accurate and efficient reliability estimation techniques during ADL-driven embedded processor design.

Zheng Wang, Kapil Singh, Chao Chen, Anupam Chattopadhyay

Proceedings of the Design, Automation and Test in Europe, 2013