Yongkui Yang

Orcid: 0000-0003-1159-3115

According to our database1, Yongkui Yang authored at least 21 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
AnchorCapsule: A Datastream-Serving Post-Processor for Object Detection in Embedded Vision SoC.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

Guser: A GPGPU Power Stressmark Generator.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023
A Network-on-Chip-Based Annealing Processing Architecture for Large-Scale Fully Connected Ising Model.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023

A High-Linearity, Energy-Efficient Switched-Capacitor Computing Circuit for Edge Applications.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A High Voltage Bootstrapped Switch Based SAR ADC for Battery Management System.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

COMPACT: Co-processor for Multi-mode Precision-adjustable Non-linear Activation Functions.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
An Energy-Efficient Method for Recurrent Neural Network Inference in Edge Cloud Computing.
Symmetry, 2022

A Fully-Connected and Area-Efficient Ising Model Annealing Accelerator for Combinatorial Optimization Problems.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

Context-Enhanced Stereo Transformer.
Proceedings of the Computer Vision - ECCV 2022, 2022

2021
sEMG-Based Gesture Recognition Using GRU With Strong Robustness Against Forearm Posture.
Proceedings of the IEEE International Conference on Real-time Computing and Robotics, 2021

CNN-DMA: A Predictable and Scalable Direct Memory Access Engine for Convolutional Neural Network with Sliding-window Filtering.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

OR-ML: Enhancing Reliability for Machine Learning Accelerator with Opportunistic Redundancy.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Highly-accurate gesture recognition based on ResNet with low-budget data gloves.
Proceedings of the AISS 2021: 3rd International Conference on Advanced Information Science and System, Sanya, China, November 26, 2021

Improving system latency of AI accelerator with on-chip pipelined activation preprocessing and multi-mode batch inference.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
Accelerating Atrous Convolution with Fetch-and-Jump Architecture for Activation Positioning.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2018
A 10-Bit 300 kS/s Reference-Voltage Regulator Free SAR ADC for Wireless-Powered Implantable Medical Devices.
Sensors, 2018

2016
A 151-nW Adaptive Delta-Sampling ADC for Ultra-Low Power Sensing Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A start-up free 200nW bandgap voltage reference.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

2015
An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

2014
A 457 nW Near-Threshold Cognitive Multi-Functional ECG Processor for Long-Term Cardiac Monitoring.
IEEE J. Solid State Circuits, 2014

A three-topology based, wide input range switched-capacitor DC-DC converter with low-ripple and enhanced load line regulations.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014


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