Chen-Yen Ho

According to our database1, Chen-Yen Ho authored at least 8 papers between 2010 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
An 87.1% efficiency RF-PA envelope-tracking modulator for 80MHz LTE-Advanced transmitter and 31dBm PA output power for HPUE in 0.153μm CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2015
A 4.5 mW CT Self-Coupled ΔΣ Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation.
IEEE J. Solid State Circuits, 2015

15.2 A 4.5mW CT self-coupled ΔΣ modulator with 2.2MHz BW and 90.4dB SNDR using residual ELD compensation.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
A power management unit integrated ADSL/ADSL2+ CPE analog front-end with -93.5dB THD for DMT-based applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013
A 64-fJ/Conv.-Step Continuous-Time Sigma Delta Modulator in 40-nm CMOS Using Asynchronous SAR Quantizer and Digital Delta Sigma Truncator.
IEEE J. Solid State Circuits, 2013

2011
A Quadrature Bandpass Continuous-Time Delta-Sigma Modulator for a Tri-Mode GSM-EDGE/UMTS/DVB-T Receiver.
IEEE J. Solid State Circuits, 2011

A 75.1dB SNDR, 80.2dB DR, 4th-order feed-forward continuous-time sigma-delta modulator with hybrid integrator for silicon TV-tuner application.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010


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