Chengen Yang

According to our database, Chengen Yang authored at least 14 papers between 1991 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Cost-Effective Design Solutions for Enhancing PRAM Reliability and Performance.

Chengen Yang, Manqing Mao, Yu Cao, Chaitali Chakrabarti

IEEE Trans. Multi Scale Comput. Syst., 2017

2014

A Low Cost Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell Pram.

Chengen Yang, Yunus Emre, Zihan Xu, Hsing Min Chen, Yu Cao, Chaitali Chakrabarti

J. Signal Process. Syst., 2014

Improving the Reliability of MLC NAND Flash Memories Through Adaptive Data Refresh and Error Control Coding.

Chengen Yang, Hsing Min Chen, Trevor N. Mudge, Chaitali Chakrabarti

J. Signal Process. Syst., 2014

Low cost ECC schemes for improving the reliability of DRAM+PRAMMAIN memory systems.

Manqing Mao, Chengen Yang, Zihan Xu, Yu Cao, Chaitali Chakrabarti

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Stochastic Parameterization to Represent Variability and Extremes in Climate Modeling.

Roisin Langan, Richard Archibald, Matthew Plumlee, Salil Mahajan, Daniel M. Ricciuto, Chengen Yang, Rui Mei, Jiafu Mao, Xiaoying Shi, Joshua S. Fu

Proceedings of the International Conference on Computational Science, 2014

2013

Data storage time sensitive ECC schemes for MLC NAND Flash memories.

Chengen Yang, Deepak Muckatira, Aditya Kulkarni, Chaitali Chakrabarti

Proceedings of the IEEE International Conference on Acoustics, 2013

Compact modeling of STT-MTJ for SPICE simulation.

Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao

Proceedings of the European Solid-State Device Research Conference, 2013

2012

Product Code Schemes for Error Correction in MLC NAND Flash Memories.

Chengen Yang, Yunus Emre, Chaitali Chakrabarti

IEEE Trans. Very Large Scale Integr. Syst., 2012

Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding.

Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti

EURASIP J. Adv. Signal Process., 2012

Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell PRAM.

Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Enhancing the Reliability of STT-RAM through Circuit and System Level Techniques.

Yunus Emre, Chengen Yang, Ketul Sutaria, Yu Cao, Chaitali Chakrabarti

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Hierarchical modeling of Phase Change memory for reliable design.

Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011

Flexible product code-based ECC schemes for MLC NAND Flash memories.

Chengen Yang, Yunus Emre, Chaitali Chakrabarti, Trevor N. Mudge

Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

1991

A primal-dual algorithm for the minimum average weighted length circuit problem.

Chengen Yang, Dayong Jin

Networks, 1991