Ketul Sutaria

According to our database1, Ketul Sutaria authored at least 10 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
RTN in Scaled Transistors for On-Chip Random Seed Generation.
IEEE Trans. VLSI Syst., 2017

2015
Duty cycle shift under static/dynamic aging in 28nm HK-MG technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014
Cross-Layer Modeling and Simulation of Circuit Reliability.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2014

Where is the Achilles Heel under Circuit Aging.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

BTI-Induced Aging under Random Stress Waveforms: Modeling, Simulation and Silicon Validation.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Compact modeling of STT-MTJ for SPICE simulation.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
Enhancing the Reliability of STT-RAM through Circuit and System Level Techniques.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Hierarchical modeling of Phase Change memory for reliable design.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Physics matters: statistical aging prediction under trapping/detrapping.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Statistical aging under dynamic voltage scaling: A logarithmic model approach.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012


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