Chi Lan Phuong Nguyen

According to our database, Chi Lan Phuong Nguyen authored at least 3 papers between 2016 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

A 197mW 70ms-Latency Full-HD 12-Channel Video-Processing SoC in 16nm CMOS for In-Vehicle Information Systems.

Seiji Mochizuki, Katsushige Matsubara, Keisuke Matsumoto, Chi Lan Phuong Nguyen, Tetsuya Shibayama, Kenichi Iwata, Katsuya Mizumoto, Takahiro Irita, Hirotaka Hara, Toshihiro Hattori

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

2016

4.4 A 197mW 70ms-latency full-HD 12-channel video-processing SoC for car information systems.

Seiji Mochizuki, Katsushige Matsubara, Keisuke Matsumoto, Chi Lan Phuong Nguyen, Tetsuya Shibayama, Kenichi Iwata, Katsuya Mizumoto, Takahiro Irita, Hirotaka Hara, Toshihiro Hattori

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

71% Reducing the memory bandwidth requirement for a multi-standard video codec by lossless compression of video using a combination of 2D-DPCM and Variable Length Coding.

Chi Lan Phuong Nguyen, My Phi Ngoc Nguyen, Hung Van Cao, Katsushige Matsubara, Keisuke Matsumoto, Seiji Mochizuki, Kenichi Iwata

Proceedings of the International Conference on IC Design and Technology, 2016