Kenichi Iwata

According to our database1, Kenichi Iwata authored at least 20 papers between 1994 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Effectiveness of Body Movements to Enjoy Online Classes.
J. Inf. Process., 2024

2023
Potential of Visualization to Explain Quantum Algorithms.
Proceedings of the 27th International Conference Information Visualisation, 2023

2019
A Proposal of Visualization System for Understanding Quantum Algorithms.
Proceedings of the 23rd International Conference in Information Visualization, 2019

2017
A 197mW 70ms-Latency Full-HD 12-Channel Video-Processing SoC in 16nm CMOS for In-Vehicle Information Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

2016
4.4 A 197mW 70ms-latency full-HD 12-channel video-processing SoC for car information systems.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

71% Reducing the memory bandwidth requirement for a multi-standard video codec by lossless compression of video using a combination of 2D-DPCM and Variable Length Coding.
Proceedings of the International Conference on IC Design and Technology, 2016

2014
Flip Visualization for Web Based Demographic Simulation System.
Proceedings of the 18th International Conference on Information Visualisation, 2014

2012
Intra texture prediction based on repetitive pixel replenishment.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012

2011
A 768 Megapixels/sec inverse transform with hybrid architecture for multi-standard decoder.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
A 342 mW Mobile Application Processor With Full-HD Multi-Standard Video Codec and Tile-Based Address-Translation Circuits.
IEEE J. Solid State Circuits, 2010

2009
A Full HD Multistandard Video Codec for Mobile Applications.
IEEE Micro, 2009

A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS.
IEEE J. Solid State Circuits, 2009

A 342mW mobile application processor with full-HD multi-standard video codec.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A Design of Diagnosis System for Mental Disorder.
Proceedings of the KEOD 2009 - Proceedings of the International Conference on Knowledge Engineering and Ontology Development, Funchal, 2009

Development of full-HD multi-standard video CODEC IP based on heterogeneous multiprocessor architecture.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
A Method to Visualize Numerical Data with Geographical Information using Feathered Circles Painted by Color Gradation.
Proceedings of the 7th NTCIR Workshop Meeting on Evaluation of Information Access Technologies: Information Retrieval, 2008

2006
An Interactive Environment for Generating Sequential Information.
Proceedings of the 10th International Conference on Information Visualisation, 2006

2005
Visualization for Management of Electronics Product Composition.
Proceedings of the 9th International Conference on Information Visualisation, 2005

1999
The legend of dragon.
Proceedings of the 26th Annual Conference on Computer Graphics and Interactive Techniques, 1999

1994
Motion estimation using multiple image sensors.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994


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