Chih-Chieh Chou

Orcid: 0000-0002-3094-6951

According to our database1, Chih-Chieh Chou authored at least 8 papers between 2003 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Reducing Minor Page Fault Overheads through Enhanced Page Walker.
ACM Trans. Archit. Code Optim., 2022

2020
Virtualize and share non-volatile memories in user space.
CCF Trans. High Perform. Comput., 2020

2019
Optimizing Post-Copy Live Migration with System-Level Checkpoint Using Fabric-Attached Memory.
Proceedings of the 2019 IEEE/ACM Workshop on Memory Centric High Performance Computing, 2019

vNVML: An Efficient User Space Library for Virtualizing and Sharing Non-Volatile Memories.
Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019

2006
A Necessary and Sufficient Condition for the Construction of 2-to-1 Optical FIFO Multiplexers by a Single Crossbar Switch and Fiber Delay Lines.
IEEE Trans. Inf. Theory, 2006

Bounding DMA Interference on Hard-Real-Time Embedded Systems.
J. Inf. Sci. Eng., 2006

2005
Communication-driven task binding for multiprocessor with latency insensitive network-on-chip.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2003
Bounding the Execution Times of DMA I/O Tasks on Hard-Real-Time Embedded Systems.
Proceedings of the Real-Time and Embedded Computing Systems and Applications, 2003


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