Paul Gratz

According to our database, Paul Gratz authored at least 88 papers between 2006 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

KVRangeDB: Range Queries for a Hash-based Key-Value Device.

Mian Qin, Qing Zheng, Jason Lee, Bradley W. Settlemyer, Fei Wen, A. L. Narasimha Reddy, Paul Gratz

ACM Trans. Storage, August, 2023

Flow Correlator: A Flow Table Cache Management Strategy.

Luke McHale, Paul V. Gratz, Alex Sprintson

CoRR, 2023

Machine Learning for Microprocessor Performance Bug Localization.

Erick Carvajal Barboza, Mahesh Ketkar, Michael Kishinevsky, Paul Gratz, Jiang Hu

CoRR, 2023

Last-Level Cache Insertion and Promotion Policy in the Presence of Aggressive Prefetching.

Daniel A. Jiménez, Elvira Teran, Paul V. Gratz

IEEE Comput. Archit. Lett., 2023

A Characterization of the Effects of Software Instruction Prefetching on an Aggressive Front-end.

Gino Chacon, Nathan Gober, Krishnendra Nathella, Paul V. Gratz, Daniel A. Jiménez

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

2022

Software Hint-Driven Data Management for Hybrid Memory in Mobile Systems.

Fei Wen, Mian Qin, Paul Gratz, A. L. Narasimha Reddy

ACM Trans. Embed. Comput. Syst., 2022

SIMD-Matcher: A SIMD-based Arbitrary Matching Framework.

Ping Wang, Fei Wen, Paul V. Gratz, Alex Sprintson

ACM Trans. Archit. Code Optim., 2022

Reducing Minor Page Fault Overheads through Enhanced Page Walker.

Chandrahas Tirumalasetty, Chih-Chieh Chou, A. L. Narasimha Reddy, Paul Gratz, Ayman Abouelwafa

ACM Trans. Archit. Code Optim., 2022

The Championship Simulator: Architectural Simulation for Education and Competition.

Nathan Gober, Gino Chacon, Lei Wang, Paul V. Gratz, Daniel A. Jiménez, Elvira Teran, Seth H. Pugsley, Jinchun Kim

CoRR, 2022

Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems.

Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz

IEEE Comput. Archit. Lett., 2022

Page Size Aware Cache Prefetching.

Georgios Vavouliotis, Gino Chacon, Lluc Alvarez, Paul V. Gratz, Daniel A. Jiménez, Marc Casas

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Composite Instruction Prefetching.

Gino Chacon, Elba Garza, Alexandra Jimborean, Alberto Ros, Paul V. Gratz, Daniel A. Jiménez, Samira Mirbagher Ajorpaz

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

SLAP-CC: Set-Level Adaptive Prefetching for Compressed Caches.

Laith M. AlBarakat, Paul V. Gratz, Daniel A. Jiménez

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Stay in your Lane: A NoC with Low-overhead Multi-packet Bypassing.

Hossein Farrokhbakht, Paul V. Gratz, Tushar Krishna, Joshua San Miguel, Natalie D. Enright Jerger

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

Interposer-Based Root of Trust.

Tapojyoti Mandal, Gino Chacon, Johann Knechtel, Ozgur Sinanoglu, Paul Gratz, Vassos Soteriou

CoRR, 2021

KVRAID: high performance, write efficient, update friendly erasure coding scheme for KV-SSDs.

Mian Qin, A. L. Narasimha Reddy, Paul V. Gratz, Rekha Pitchumani, Yang-Seok Ki

Proceedings of the SYSTOR '21: The 14th ACM International Systems and Storage Conference, 2021

SEEC: stochastic escape express channel.

Mayank Parasar, Natalie D. Enright Jerger, Paul V. Gratz, Joshua San Miguel, Tushar Krishna

Proceedings of the International Conference for High Performance Computing, 2021

Pitstop: Enabling a Virtual Network Free Network-on-Chip.

Hossein Farrokhbakht, Henry Kao, Kamran Hasan, Paul V. Gratz, Tushar Krishna, Joshua San Miguel, Natalie D. Enright Jerger

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Automatic Microprocessor Performance Bug Detection.

Erick Carvajal Barboza, Sara Jacob, Mahesh Ketkar, Michael Kishinevsky, Paul Gratz, Jiang Hu

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

An FPGA-based Hybrid Memory Emulation System.

Fei Wen, Mian Qin, Paul Gratz, A. L. Narasimha Reddy

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

CMRC: Comprehensive Microarchitectural Register Coalescing for GPGPUs.

Ahmad M. Radaideh, Paul V. Gratz

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

OpenMem: Hardware/Software Cooperative Management for Mobile Memory System.

Fei Wen, Mian Qin, Paul Gratz, A. L. Narasimha Reddy

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Hardware Memory Management for Future Mobile Hybrid Memory Systems.

Fei Wen, Mian Qin, Paul V. Gratz, A. L. Narasimha Reddy

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

FPGA-based Hyrbid Memory Emulation System.

Fei Wen, Mian Qin, Paul V. Gratz, A. L. Narasimha Reddy

CoRR, 2020

Virtualize and share non-volatile memories in user space.

Chih-Chieh Chou, Jaemin Jung, A. L. Narasimha Reddy, Paul V. Gratz, Doug Voigt

CCF Trans. High Perform. Comput., 2020

SB-Fetch: synchronization aware hardware prefetching for chip multiprocessors.

Laith M. AlBarakat, Paul V. Gratz, Daniel A. Jiménez

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

DRAIN: Deadlock Removal for Arbitrary Irregular Networks.

Mayank Parasar, Hossein Farrokhbakht, Natalie D. Enright Jerger, Paul V. Gratz, Tushar Krishna, Joshua San Miguel

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Exploiting Zero Data to Reduce Register File and Execution Unit Dynamic Power Consumption in GPGPUs.

Ahmad M. Radaideh, Paul V. Gratz

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

A Generic FPGA Accelerator for Minimum Storage Regenerating Codes.

Mian Qin, Joo Hwan Lee, Rekha Pitchumani, Yang-Seok Ki, A. L. Narasimha Reddy, Paul V. Gratz

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

GenMatcher: A Generic Clustering-Based Arbitrary Matching Framework.

Ping Wang, Luke McHale, Paul V. Gratz, Alex Sprintson

ACM Trans. Archit. Code Optim., 2019

Synchronized Progress in Interconnection Networks (SPIN): A New Theory for Deadlock Freedom.

Aniruddh Ramrakhyani, Paul V. Gratz, Tushar Krishna

IEEE Micro, 2019

Optimizing Post-Copy Live Migration with System-Level Checkpoint Using Fabric-Attached Memory.

Chih-Chieh Chou, Yuan Chen, Dejan S. Milojicic, A. L. Narasimha Reddy, Paul Gratz

Proceedings of the 2019 IEEE/ACM Workshop on Memory Centric High Performance Computing, 2019

vNVML: An Efficient User Space Library for Virtualizing and Sharing Non-Volatile Memories.

Chih-Chieh Chou, Jaemin Jung, A. L. Narasimha Reddy, Paul V. Gratz, Doug Voigt

Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019

SWAP: Synchronized Weaving of Adjacent Packets for Network Deadlock Resolution.

Mayank Parasar, Natalie D. Enright Jerger, Paul V. Gratz, Joshua San Miguel, Tushar Krishna

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Perceptron-based prefetch filtering.

Eshan Bhatia, Gino Chacon, Seth H. Pugsley, Elvira Teran, Paul V. Gratz, Daniel A. Jiménez

Proceedings of the 46th International Symposium on Computer Architecture, 2019

SpecLock: Speculative Lock Forwarding.

Pooria M. Yaghini, George Michelogiannakis, Paul V. Gratz

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

The Best of IEEE Computer Architecture Letters in 2018.

Paul Gratz

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

2018

Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques.

Sébastien Le Beux, Paul V. Gratz, Ian O'Connor

IEEE Trans. Multi Scale Comput. Syst., 2018

SDPR: Improving Latency and Bandwidth in On-Chip Interconnect Through Simultaneous Dual-Path Routing.

Yoon Seok Yang, Hrishikesh Deshpande, Gwan Choi, Paul V. Gratz

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors.

Laith M. AlBarakat, Paul V. Gratz, Daniel A. Jiménez

IEEE Comput. Archit. Lett., 2018

2017

Speculative paging for future NVM storage.

Viacheslav V. Fedorov, Jinchun Kim, Mian Qin, Paul V. Gratz, A. L. Narasimha Reddy

Proceedings of the International Symposium on Memory Systems, 2017

Minimal exercise vector generation for reliability improvement.

P. Madhukar Reddy, Stavros Hadjitheophanous, Vassos Soteriou, Paul V. Gratz, Maria K. Michael

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy.

Jinchun Kim, Elvira Teran, Paul V. Gratz, Daniel A. Jiménez, Seth H. Pugsley, Chris Wilkerson

Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016

GCA: Global Congestion Awareness for Load Balance in Networks-on-Chip.

Mukund Ramakrishna, Vamsi Krishna Kodati, Paul V. Gratz, Alexander Sprintson

IEEE Trans. Parallel Distributed Syst., 2016

Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory.

Jae-Yeon Won, Paul V. Gratz, Srinivas Shakkottai, Jiang Hu

ACM Trans. Design Autom. Electr. Syst., 2016

Path confidence based lookahead prefetching.

Jinchun Kim, Seth H. Pugsley, Paul V. Gratz, A. L. Narasimha Reddy, Chris Wilkerson, Zeshan Chishti

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

2015

Use It or Lose It: Proactive, Deterministic Longevity in Future Chip Multiprocessors.

Hyungjun Kim, Siva Bhanu Krishna Boga, Arseniy Vitkovskiy, Stavros Hadjitheophanous, Paul V. Gratz, Vassos Soteriou, Maria K. Michael

ACM Trans. Design Autom. Electr. Syst., 2015

Wear-Aware Adaptive Routing for Networks-on-Chips.

Arseni Vitkovski, Vassos Soteriou, Paul V. Gratz

Proceedings of the 9th International Symposium on Networks-on-Chip, 2015

Dynamic Memory Pressure Aware Ballooning.

Jinchun Kim, Viacheslav V. Fedorov, Paul V. Gratz, A. L. Narasimha Reddy

Proceedings of the 2015 International Symposium on Memory Systems, 2015

Shared Last-Level Caches and The Case for Longer Timeslices.

Viacheslav V. Fedorov, A. L. Narasimha Reddy, Paul V. Gratz

Proceedings of the 2015 International Symposium on Memory Systems, 2015

Having your cake and eating it too: Energy savings without performance loss through resource sharing driven power management.

Jae-Yeon Won, Paul Gratz, Srinivas Shakkottai, Jiang Hu

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects.

Arseniy Vitkovskiy, Vassos Soteriou, Paul V. Gratz

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Energy-efficient implementations of GF (p) and GF(2m) elliptic curve cryptography.

Andrew D. Targhetta, Donald E. Owen, Francis L. Israel, Paul V. Gratz

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

A control-theoretic approach for energy efficient CPU-GPU subsystem in mobile platforms.

David Kadjo, Raid Ayoub, Michael Kishinevsky, Paul V. Gratz

Proceedings of the 52nd Annual Design Automation Conference, 2015

Bandwidth-efficient on-chip interconnect designs for GPGPUs.

Hyunjun Jang, Jinchun Kim, Paul Gratz, Ki Hwan Yum, Eun Jung Kim

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

WaveSync: Low-Latency Source-Synchronous Bypass Network-on-Chip Architecture.

Yoon Seok Yang, Reeshav Kumar, Gwan S. Choi, Paul V. Gratz

ACM Trans. Design Autom. Electr. Syst., 2014

LumiNOC: A Power-Efficient, High-Performance, Photonic Network-on-Chip.

Cheng Li, Mark Browning, Paul V. Gratz, Samuel Palermo

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip.

Hyungjun Kim, Boris Grot, Paul V. Gratz, Daniel A. Jiménez

IEEE Trans. Computers, 2014

Towards platform level power management in mobile systems.

David Kadjo, Ümit Y. Ogras, Raid Ayoub, Michael Kishinevsky, Paul Gratz

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

STORM: A Simple Traffic-Optimized Router Microarchitecture for Networks-on-Chip.

Shalimar Rasheed, Paul V. Gratz, Srinivas Shakkottai, Jiang Hu

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

B-Fetch: Branch Prediction Directed Prefetching for Chip-Multiprocessors.

David Kadjo, Jinchun Kim, Prabal Sharma, Reena Panda, Paul Gratz, Daniel A. Jiménez

Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

The design space of ultra-low energy asymmetric cryptography.

Andrew D. Targhetta, Donald E. Owen, Paul V. Gratz

Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014

Stochastic Pre-classification for SDN Data Plane Matching.

Luke McHale, C. Jasson Casey, Paul V. Gratz, Alex Sprintson

Proceedings of the 22nd IEEE International Conference on Network Protocols, 2014

Up by their bootstraps: Online learning in Artificial Neural Networks for CMP uncore power management.

Jae-Yeon Won, Xi Chen, Paul Gratz, Jiang Hu, Vassos Soteriou

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

ILP and TLP in shared memory applications: a limit study.

Ehsan Fatehi, Paul Gratz

Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013

In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches.

Xi Chen, Zheng Xu, Hyungjun Kim, Paul Gratz, Jiang Hu, Michael Kishinevsky, Ümit Y. Ogras

ACM Trans. Design Autom. Electr. Syst., 2013

ARI: Adaptive LLC-memory traffic management.

Viacheslav V. Fedorov, Sheng Qiu, A. L. Narasimha Reddy, Paul V. Gratz

ACM Trans. Archit. Code Optim., 2013

LumiNOC: A low-latency, high-bandwidth per Watt, photonic Network-on-Chip.

Mark Browning, Cheng Li, Paul V. Gratz, Samuel Palermo

Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2013

GCA: Global congestion awareness for load balance in Networks-on-Chip.

Mukund Ramakrishna, Paul V. Gratz, Alexander Sprintson

Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013

Use it or lose it: wear-out and lifetime in future chip multiprocessors.

Hyungjun Kim, Arseniy Vitkovskiy, Paul V. Gratz, Vassos Soteriou

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Bidirectional interconnect design for low latency high bandwidth NoC.

Reeshav Kumar, Hrishikesh Deshpande, Gwan S. Choi, Alexander Sprintson, Paul Gratz

Proceedings of 2013 International Conference on IC Design & Technology, 2013

Power gating with block migration in chip-multiprocessor last-level caches.

David Kadjo, Hyungjun Kim, Paul Gratz, Jiang Hu, Raid Ayoub

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Stochastic Pre-Classification for Software Defined Firewalls.

Pritha Ghoshal, C. Jasson Casey, Paul V. Gratz, Alex Sprintson

Proceedings of the 22nd International Conference on Computer Communication and Networks, 2013

Dynamic voltage and frequency scaling for shared resources in multicore processor designs.

Xi Chen, Zheng Xu, Hyungjun Kim, Paul V. Gratz, Jiang Hu, Michael Kishinevsky, Ümit Y. Ogras, Raid Zuhair Ayoub

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

B-Fetch: Branch Prediction Directed Prefetching for In-Order Processors.

Reena Panda, Paul V. Gratz, Daniel A. Jiménez

IEEE Comput. Archit. Lett., 2012

Exploiting path diversity for low-latency and high-bandwidth with the dual-path NoC router.

Yoon Seok Yang, Hrishikesh Deshpande, Gwan S. Choi, Paul Gratz

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

LumiNOC: a power-efficient, high-performance, photonic network-on-chip for future parallel architectures.

Cheng Li, Mark Browning, Paul V. Gratz, Samuel Palermo

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Asynchronous Bypass Channels for Multi-Synchronous NoCs: A Router Microarchitecture, Topology, and Routing Algorithm.

Tushar N. K. Jain, Mukund Ramakrishna, Paul V. Gratz, Alexander Sprintson, Gwan Choi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

AcENoCs: A Configurable HW/SW Platform for FPGA Accelerated NoC Emulation.

Swapnil Lotlikar, Vinayak Pai, Paul V. Gratz

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Reducing network-on-chip energy consumption through spatial locality speculation.

Hyungjun Kim, Pritha Ghoshal, Boris Grot, Paul V. Gratz, Daniel A. Jiménez

Proceedings of the NOCS 2011, 2011

2010

Leveraging Unused Cache Block Words to Reduce Power in CMP Interconnect.

Hyungjun Kim, Paul V. Gratz

IEEE Comput. Archit. Lett., 2010

Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs.

Tushar N. K. Jain, Paul V. Gratz, Alexander Sprintson, Gwan Choi

Proceedings of the NOCS 2010, 2010

2009

An evaluation of the TRIPS computer system.

Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley

Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, 2009

2008

Regional congestion awareness for load balance in networks-on-chip.

Paul Gratz, Boris Grot, Stephen W. Keckler

Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008

2007

On-Chip Interconnection Networks of the TRIPS Chip.

Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger

IEEE Micro, 2007

Implementation and Evaluation of a Dynamically Routed Processor Operand Network.

Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger

Proceedings of the First International Symposium on Networks-on-Chips, 2007

2006

Distributed Microarchitectural Protocols in the TRIPS Prototype Processor.

Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

Implementation and Evaluation of On-Chip Network Architectures.

Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006