Christian Fensch

According to our database1, Christian Fensch authored at least 21 papers between 2004 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Device Hopping: Transparent Mid-Kernel Runtime Switching for Heterogeneous Systems.
ACM Trans. Archit. Code Optim., 2021

2020
Enforcing Deadlines for Skeleton-based Parallel Programming.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

2018
MaxPair: Enhance OpenCL Concurrent Kernel Execution by Weighted Maximum Matching.
Proceedings of the 11th Workshop on General Purpose Processing using GPUs, 2018

NUMA Optimizations for Algorithmic Skeletons.
Proceedings of the Euro-Par 2018: Parallel Processing, 2018

A Lightweight Approach to GPU Resilience.
Proceedings of the Euro-Par 2018: Parallel Processing Workshops, 2018

2015
Patterns and Rewrite Rules for Systematic Code Generation (From High-Level Functional Patterns to High-Performance OpenCL Code).
CoRR, 2015

Helium: a transparent inter-kernel optimizer for OpenCL.
Proceedings of the 8th Workshop on General Purpose Processing using GPUs, 2015

Generating performance portable code using rewrite rules: from high-level functional expressions to high-performance OpenCL code.
Proceedings of the 20th ACM SIGPLAN International Conference on Functional Programming, 2015

LIRA: Adaptive Contention-Aware Thread Placement for Parallel Runtime Systems.
Proceedings of the 5th International Workshop on Runtime and Operating Systems for Supercomputers, 2015

2013
Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors.
IEEE Trans. Computers, 2013

PARTANS: An autotuning framework for stencil computation on multi-GPU systems.
ACM Trans. Archit. Code Optim., 2013

MaSiF: Machine learning guided auto-tuning of parallel skeletons.
Proceedings of the 20th Annual International Conference on High Performance Computing, 2013

General chairs' welcome message.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012
Auto-Tuning Parallel Skeletons.
Parallel Process. Lett., 2012

MaSiF: machine learning guided auto-tuning of parallel skeletons.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
An Evaluation of an OS-Based Coherence Scheme for Tiled CMPs.
Int. J. Parallel Program., 2011

2010
Proximity coherence for chip multiprocessors.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009
A communication characterisation of Splash-2 and Parsec.
Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009

2008
An OS-based alternative to full hardware coherence on tiled chip-multiprocessors.
PhD thesis, 2008

An OS-based alternative to full hardware coherence on tiled CMPs.
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008

2004
Class Splitting as a Method to Reduce Migration Overhead of Mobile Agents.
Proceedings of the On the Move to Meaningful Internet Systems 2004: CoopIS, 2004


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