Chun-Seok Jeong

According to our database, Chun-Seok Jeong authored at least 4 papers between 2004 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

Skew Compensation Technique for Source-Synchronous Parallel DRAM Interface.

Jang-Woo Lee, Hong-Jung Kim, Chun-Seok Jeong, Jae-Jin Lee, Changsik Yoo

IEEE Trans. Very Large Scale Integr. Syst., 2013

2009

A 5-Gbit/s Clock- and Data-Recovery Circuit With 1/8-Rate Linear Phase Detector in 0.18-μm CMOS Technology.

Young-Suk Seo, Jang-Woo Lee, Hong-Jung Kim, Changsik Yoo, Jae-Jin Lee, Chun-Seok Jeong

IEEE Trans. Circuits Syst. II Express Briefs, 2009

2005

A 1.2V, 10MHz, low-pass Gm-C filter with Gm-cells based on triode-biased MOS and passive resistor in 0.13μm CMOS technology.

Jun-Gi Jo, Changsik Yoo, Chun-Seok Jeong, Chan-Young Jeong, Mi-Young Lee, Jong-Kee Kwon

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

Digital delay locked loop with open-loop digital duty cycle corrector for 1.2Gb/s/pin double data rate SDRAM.

Chun-Seok Jeong, Changsik Yoo, Jae-Jin Lee, Joongsik Kih

Proceedings of the 33rd European Solid-State Circuits Conference, 2004