Jong-Kee Kwon

According to our database1, Jong-Kee Kwon authored at least 24 papers between 2005 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
A 500-MHz Bandwidth 7.5-mV<sub>pp</sub> Ripple Power-Amplifier Supply Modulator for RF Polar Transmitters.
IEEE J. Solid State Circuits, 2018

2012
A Dual-Channel Pipelined ADC With Sub-ADC Based on Flash-SAR Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

Adaptive Energy Management System Based on Low-Power Microcontroller with Energy harvesting at Maximum Power.
J. Circuits Syst. Comput., 2012

2011
A 12-bit 200-MS/s pipelined A/D converter with sampling skew reduction technique.
Microelectron. J., 2011

A 10-bit 30-MS/s successive approximation register analog-to-digital converter for low-power sub-sampling applications.
Microelectron. J., 2011

A 550-μW 10-b 40-MS/s SAR ADC With Multistep Addition-Only Digital Error Correction.
IEEE J. Solid State Circuits, 2011

A Novel Timing Estimation Method for Chirp-Based Systems.
IEICE Trans. Commun., 2011

A 12-bit 100-MS/s pipelined ADC in 45-nm CMOS.
Proceedings of the International SoC Design Conference, 2011

A ΔΣ ADC using 4-bit SAR type quantizer for audio applications.
Proceedings of the International SoC Design Conference, 2011

2010
A 9-bit 80 MS/s Successive Approximation Register Analog-to-Digital Converter With a Capacitor Reduction Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A 105dB-gain 500MHz-bandwidth 0.1Ω-output-impedance amplifier for an amplitude modulator in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 9.15mW 0.22mm<sup>2</sup> 10b 204MS/s pipelined SAR ADC in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A 550µW 10b 40MS/s SAR ADC with multistep addition-only digital error correction.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
A 0.6-V Delta-Sigma Modulator With Subthreshold-Leakage Suppression Switches.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

ESD protection circuit with low triggering voltage and fast turn-on using substrate-triggered technique.
IEICE Electron. Express, 2009

A 2.85mW 0.12mm2 1.0V 11-bit 20-MS/s algorithmic ADC in 65nm CMOS.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
A 0.9-V 60-µW 1-Bit Fourth-Order Delta-Sigma Modulator With 83-dB Dynamic Range.
IEEE J. Solid State Circuits, 2008

A 105.5 dB, 0.49 mm<sup>2</sup> Audio ΣΔ modulator using chopper stabilization and fully randomized DWA.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A 10-bit 205-MS/s 1.0-mm<sup>2</sup> 90-nm CMOS Pipeline ADC for Flat Panel Display Applications.
IEEE J. Solid State Circuits, 2007

A 10b 205MS/s 1mm2 90nm CMOS Pipeline ADC for Flat-Panel Display Applications.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 4.7mW 0.32mm2 10b 30MS/s Pipelined ADC Without a Front-End S/H in 90nm CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
A 3.8-5.5-GHz Multi-Band CMOS Frequency Synthesizer for WPAN/WLAN Applications.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

A 10b 25MS/s 4.8mW 0.13um CMOS ADC for Digital Multimedia Broadcasting Applications.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
A 1.2V, 10MHz, low-pass Gm-C filter with Gm-cells based on triode-biased MOS and passive resistor in 0.13μm CMOS technology.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005


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