Joongsik Kih

According to our database1, Joongsik Kih authored at least 2 papers between 1994 and 2004.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2004
Digital delay locked loop with open-loop digital duty cycle corrector for 1.2Gb/s/pin double data rate SDRAM.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

1994
An experimental high-density DRAM cell with a built-in gain stage.
IEEE J. Solid State Circuits, August, 1994


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