Daeyun Kim

Orcid: 0000-0001-8456-0344

According to our database1, Daeyun Kim authored at least 13 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
An Indirect Time-of-Flight CMOS Image Sensor Achieving Sub-ms Motion Lagging and 60fps Depth Image from On-chip ISP.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021
A 1.2-Mpixel Indirect Time-of-Flight Image Sensor With 4-Tap 3.5-μm Pixels for Peak Current Mitigation and Multi-User Interference Cancellation.
IEEE J. Solid State Circuits, 2021

A 4-tap 3.5 μm 1.2 Mpixel Indirect Time-of-Flight CMOS Image Sensor with Peak Current Mitigation and Multi-User Interference Cancellation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
A VGA Indirect Time-of-Flight CMOS Image Sensor With 4-Tap 7- $\mu$ m Global-Shutter Pixel and Fixed-Pattern Phase Noise Self-Compensation.
IEEE J. Solid State Circuits, 2020

2019
A 640×480 Indirect Time-of-Flight CMOS Image Sensor with 4-tap 7-μm Global-Shutter Pixel and Fixed-Pattern Phase Noise Self-Compensation Scheme.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018
Complex Event Processing for Sensor Stream Data.
Sensors, 2018

2014
A Two-Step A/D Conversion and Column Self-Calibration Technique for Low Noise CMOS Image Sensors.
Sensors, 2014

2012
An Enhanced Dynamic-Range CMOS Image Sensor Using a Digital Logarithmic Single-Slope ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A wide dynamic range CMOS image sensor based on a new gamma correction technique.
Proceedings of the International SoC Design Conference, 2012

Design of a 10-bit CMOS image sensor based on an 8-bit configurable hold-and-go counter.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
A 65 nm 1.2 V 7-bit 1 GSPS Folding-Interpolation A/D Converter with a Digitally Self-Calibrated Vector Generator.
IEICE Trans. Electron., 2011

2010
A digitally self-calibrated low-noise 7-bit folding A/D converter.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Design of a 7-bit 1GSPS folding-interpolation A/D converter with self-calibration technique.
Proceedings of the 17th IEEE International Conference on Electronics, 2010


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