Dan Tang

Orcid: 0009-0006-6631-6392

Affiliations:
  • Beijing Institute of Open Source Chip, Beijing, China


According to our database1, Dan Tang authored at least 10 papers between 2010 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
TraceRTL: Agile Performance Evaluation for Microarchitecture Exploration.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

2025
XiangShan: An Open Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards.
IEEE Micro, 2025

Verilua: An Open Source Versatile Framework for Efficient Hardware Verification and Analysis Using LuaJIT.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024
XiangShan: An Open-Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards.
Proceedings of the 36th IEEE Hot Chips Symposium, 2024

PathFuzz: Broadening Fuzzing Horizons with Footprint Memory for CPUs.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Functional Verification for Agile Processor Development: A Case for Workflow Integration.
J. Comput. Sci. Technol., July, 2023

Toward Developing High-Performance RISC-V Processors Using Agile Methodology.
IEEE Micro, 2023

2022

2011
HMTT: A Hybrid Hardware/Software Tracing System for Bridging Memory Trace's Semantic Gap
CoRR, 2011

2010
DMA cache: Using on-chip storage to architecturally separate I/O data from CPU data for improving I/O performance.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010


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