Yungang Bao

According to our database1, Yungang Bao authored at least 58 papers between 2008 and 2020.

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Bibliography

2020
A Case for Adaptive Resource Management in Alibaba Datacenter Using Neural Networks.
J. Comput. Sci. Technol., 2020

Logless one-phase commit made possible for highly-available datastores.
Distributed and Parallel Databases, 2020

2019
BiloKey : A Scalable Bi-Index Locality-Aware In-Memory Key-Value Store.
IEEE Trans. Parallel Distrib. Syst., 2019

Practices of backuping homomorphically encrypted databases.
Frontiers Comput. Sci., 2019

Gene-Patterns: Should Architecture be Customized for Each Application?
CoRR, 2019

Computer Organization and Design Course with FPGA Cloud.
Proceedings of the 50th ACM Technical Symposium on Computer Science Education, 2019

Who limits the resource efficiency of my datacenter: an analysis of Alibaba datacenter traces.
Proceedings of the International Symposium on Quality of Service, 2019

QoSMT: supporting precise performance control for simultaneous multithreading architecture.
Proceedings of the ACM International Conference on Supercomputing, 2019

Engaging Heterogeneous FPGAs in the Cloud.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

ZyCube: An In-House Mini-Cluster for Agilely Developing and Conducting Computer Systems Course Projects.
Proceedings of the ACM Conference on Global Computing Education, 2019

2018
The rise of high-throughput computing.
Frontiers of IT & EE, 2018

Discipline Convergence in Networked Systems (Dagstuhl Seminar 18261).
Dagstuhl Reports, 2018

Avalon: Building an Operating System for Robotcenter.
CoRR, 2018

ZyForce: An FPGA-based Cloud Platform for Experimental Curriculum of Computer System in University of Chinese Academy of Sciences (Abstract Only).
Proceedings of the 49th ACM Technical Symposium on Computer Science Education, 2018

Sketchlearn: relieving user burdens in approximate measurement with automated statistical inference.
Proceedings of the 2018 Conference of the ACM Special Interest Group on Data Communication, 2018

Benchmarking SpMV Methods on Many-Core Platforms.
Proceedings of the Benchmarking, Measuring, and Optimizing, 2018

CryptZip: Squeezing out the Redundancy in Homomorphically Encrypted Backup Data.
Proceedings of the 9th Asia-Pacific Workshop on Systems, 2018

DearDRAM: Discard Weak Rows for Reducing DRAM's Refresh Overhead.
Proceedings of the Advanced Computer Architecture - 12th Conference, 2018

2017
Labeled von Neumann Architecture for Software-Defined Cloud.
J. Comput. Sci. Technol., 2017

ACIA, not ACID: Conditions, Properties and Challenges.
CoRR, 2017

Transaction Support over Redis: An Overview.
CoRR, 2017

CloudShelter: Protecting Virtual Machines' Memory Resource Availability in Clouds.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Dadu: Accelerating Inverse Kinematics for High-DOF Robots.
Proceedings of the 54th Annual Design Automation Conference, 2017

BestConfig: tapping the performance potential of systems via automatic configuration tuning.
Proceedings of the 2017 Symposium on Cloud Computing, SoCC 2017, Santa Clara, CA, USA, 2017

ACTS in Need: Automatic Configuration Tuning with Scalability Guarantees.
Proceedings of the 8th Asia-Pacific Workshop on Systems, Mumbai, India, September 2, 2017, 2017

2016
PARSEC3.0: A Multicore Benchmark Suite with Network Stacks and SPLASH-2X.
SIGARCH Computer Architecture News, 2016

Understanding the Behavior of Spark Workloads from Linux Kernel Parameters Perspective.
Proceedings of the Posters and Demos Session of the 17th International Middleware Conference, 2016

2015
Supporting Differentiated Services in Computers via Networking Technologies.
TinyToCS, 2015

Statistical Performance Comparisons of Computers.
IEEE Trans. Computers, 2015

Supporting Differentiated Services in Computers via Programmable Architecture for Resourcing-on-Demand (PARD).
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
BPM/BPM+: Software-based dynamic memory partitioning mechanisms for mitigating DRAM bank-/channel-level interferences in multicore systems.
TACO, 2014

HMTT: A hybrid hardware/software tracing system for bridging the DRAM access trace's semantic gap.
TACO, 2014

MIMS: Towards a Message Interface Based Memory System.
J. Comput. Sci. Technol., 2014

CMD: classification-based memory deduplication through page access characteristics.
Proceedings of the 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2014

QBLESS: A case for QoS-aware bufferless NoCs.
Proceedings of the IEEE 22nd International Symposium of Quality of Service, 2014

Going vertical in memory management: Handling multiplicity by multi-policy.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

DTail: a flexible approach to DRAM refresh management.
Proceedings of the 2014 International Conference on Supercomputing, 2014

A Swap-based Cache Set Index Scheme to Leverage both Superpage and Page Coloring Optimizations.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

D2P: a distributed deadline propagation approach to tolerate long-tail latency in datacenters.
Proceedings of the Asia-Pacific Workshop on Systems, 2014

2013
MIMS: Towards a Message Interface based Memory System
CoRR, 2013

A Study of Leveraging Memory Level Parallelism for DRAM System on Multi-core/Many-Core Architecture.
Proceedings of the 12th IEEE International Conference on Trust, 2013

Scattered superpage: A case for bridging the gap between superpage and page coloring.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Rethinking Virtual Machine Interference in the Era of Cloud Applications.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

2012
Trace-driven simulation of memory system scheduling in multithread application.
Proceedings of the 2012 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with PLDI '12, 2012

A lightweight hybrid hardware/software approach for object-relative memory profiling.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012

Evaluation and Optimization of Breadth-First Search on NUMA Cluster.
Proceedings of the 2012 IEEE International Conference on Cluster Computing, 2012

A software memory partition approach for eliminating bank-level interference in multicore systems.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

HaLock: hardware-assisted lock contention detection in multithreaded applications.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
What Hill-Marty model learn from and break through Amdahlʼs law?
Inf. Process. Lett., 2011

HMTT: A Hybrid Hardware/Software Tracing System for Bridging Memory Trace's Semantic Gap
CoRR, 2011

Fast implementation of DGEMM on Fermi GPU.
Proceedings of the Conference on High Performance Computing Networking, 2011

Poster: revisiting virtual channel memory for performance and fairness on multi-core architecture.
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

A fine-grained component-level power measurement method.
Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

2010
DMA cache: Using on-chip storage to architecturally separate I/O data from CPU data for improving I/O performance.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

2009
Extending Amdahl's law in the multicore era.
SIGMETRICS Performance Evaluation Review, 2009

A Scalability Analysis of the Symmetric Multiprocessing Architecture in Multi-Core System.
Proceedings of the International Conference on Networking, Architecture, and Storage, 2009

2008
HMTT: a platform independent full-system memory trace monitoring system.
Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2008

A Network Memory Architecture Model and Performance Analysis.
Proceedings of The 2008 IEEE International Conference on Networking, 2008


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