Dany Minier

According to our database1, Dany Minier authored at least 12 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Experimental Evaluation of Jitter Reduction Methods for Multi-Gigahertz Test.
Proceedings of the IEEE International Test Conference in Asia, 2023

2010
Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic.
J. Electron. Test., 2010

2009
A development platform and electronic modules for automated test up to 20 Gbps.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing.
VLSI Design, 2008

An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test.
Proceedings of the 2008 IEEE International Test Conference, 2008

Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Multi-GHz loopback testing using MEMs switches and SiGe logic.
Proceedings of the 2007 IEEE International Test Conference, 2007

Method for reducing jitter in multi-gigahertz ATE.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses.
IEEE Des. Test Comput., 2006

2004
Multiplexing ATE Channels for Production Testing at 2.5 Gbps.
IEEE Des. Test Comput., 2004

Modular Extension of ATE to 5 Gbps.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003
A Production-Oriented Multiplexing System for Testing above 2.5 Gbps.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003


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