David Defour
Orcid: 0000-0001-9923-2394
According to our database1,
David Defour
authored at least 42 papers
between 2003 and 2025.
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Bibliography
2025
CoRR, January, 2025
2023
Proceedings of the 30th IEEE Symposium on Computer Arithmetic, 2023
2022
Using scheduling entropy amplification in CUDA/OpenMP code to exhibit non-reproducibility issues.
Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022
2021
Proceedings of the 28th IEEE Symposium on Computer Arithmetic, 2021
A Study of the Effects and Benefits of Custom-Precision Mathematical Libraries for HPC Codes.
Proceedings of the 28th IEEE Symposium on Computer Arithmetic, 2021
2020
Custom-Precision Mathematical Library Explorations for Code Profiling and Optimization.
Proceedings of the 27th IEEE Symposium on Computer Arithmetic, 2020
2019
Int. J. High Perform. Comput. Appl., 2019
Automatic Exploration of Reduced Floating-Point Representations in Iterative Methods.
Proceedings of the Euro-Par 2019: Parallel Processing, 2019
2018
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018
2017
An Efficient Representation Format for Fuzzy Intervals Based on Symmetric Membership Functions.
ACM Trans. Math. Softw., 2017
IEEE Trans. Computers, 2017
Proceedings of the 25th Euromicro International Conference on Parallel, 2017
2016
J. Parallel Distributed Comput., 2016
2015
Numerical reproducibility for the parallel reduction on multi- and many-core architectures.
Parallel Comput., 2015
Measuring Predictability of Nvidia's GPU Schedulers: Application to the Summation Problem.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015
Proceedings of the 12th International Conference on Information Technology, 2015
Proceedings of the 2015 Federated Conference on Computer Science and Information Systems, 2015
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015
2014
A Fast Chaos-Based Pseudo-Random Bit Generator Using Binary64 Floating-Point Arithmetic.
Informatica (Slovenia), 2014
A Pseudo-Random Bit Generator Based on Three Chaotic Logistic Maps and IEEE 754-2008 Floating-Point Arithmetic.
Proceedings of the Theory and Applications of Models of Computation, 2014
Proceedings of the Scientific Computing, Computer Arithmetic, and Validated Numerics, 2014
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014
, 2014
2013
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Proceedings of the International Conference on Computational Science, 2013
2010
Proceedings of the MASCOTS 2010, 2010
Proceedings of the IEEE International Conference on Acoustics, 2010
2009
Proceedings of the Computational Science, 2009
Proceedings of the 42st Hawaii International International Conference on Systems Science (HICSS-42 2009), 2009
Proceedings of the Euro-Par 2009, 2009
2008
Tech. Sci. Informatiques, 2008
Comput. Phys. Commun., 2008
2007
Graphic processors to speed-up simulations for the design of high performance solar receptors.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007
2006
2005
2004
Proposal for a Standardization of Mathematical Function Implementation in Floating-Point Arithmetic.
Numer. Algorithms, 2004
2003
Fonctions élémentaires : algorithmes et implémentations efficaces pour l'arrondi correct en double précision. (Elementary functions : algorithms and efficient implementation for correct rounding for the double precision).
PhD thesis, 2003
Proceedings of the Parallel Computing Technologies, 2003