Peter Kornerup

According to our database1, Peter Kornerup authored at least 55 papers between 1974 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

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Bibliography

2017
Error bounds on complex floating-point multiplication with an FMA.
Math. Comput., 2017

2015
Reviewing High-Radix Signed-Digit Adders.
IEEE Trans. Computers, 2015

2014
Correction to the 2005 paper: "Digit Selection for SRT Division and Square Root".
CoRR, 2014

2012
On the Computation of Correctly Rounded Sums.
IEEE Trans. Computers, 2012

Floating-Point Arithmetic on Round-to-Nearest Representations
CoRR, 2012

2011
Performing Arithmetic Operations on Round-to-Nearest Representations.
IEEE Trans. Computers, 2011

Augmented Precision Square Roots and 2-D Norms, and Discussion on Correctly Rounding sqrt(x^2+y^2).
Proceedings of the 20th IEEE Symposium on Computer Arithmetic, 2011

2010
Computing correctly rounded integer powers in floating-point arithmetic.
ACM Trans. Math. Softw., 2010

2009
Guest Editors' Introduction: Special Section on Computer Arithmetic.
IEEE Trans. Computers, 2009

Correcting the Normalization Shift of Redundant Binary Representations.
IEEE Trans. Computers, 2009

2007
Computing Integer Powers in Floating-Point Arithmetic
CoRR, 2007

2006
Choosing starting values for certain Newton-Raphson iterations.
Theor. Comput. Sci., 2006

Leading Guard Digits in Finite Precision Redundant Representations.
IEEE Trans. Computers, 2006

2005
Reviewing 4-to-2 Adders for Multi-Operand Addition.
J. VLSI Signal Process., 2005

Digit Selection for SRT Division and Square Root.
IEEE Trans. Computers, 2005

A New Range-Reduction Algorithm.
IEEE Trans. Computers, 2005

Single Precision Reciprocals by Multipartite Table Lookup.
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

2003
Preface.
Theor. Comput. Sci., 2003

Revisiting SRT Quotient Digit Selection.
Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003

2001
Modular Multiplication and Base Extensions in Residue Number Systems.
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001

2000
Computing Moments by Prefix Sums.
J. VLSI Signal Process., 2000

Guest Editors' Introduction - Special Issue on Computer Arithmetic.
IEEE Trans. Computers, 2000

1999
Redundant Radix Representations of Rings.
IEEE Trans. Computers, 1999

Necessary and Sufficient Conditions for Parallel, Constant Time Conversion and Addition.
Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999

1998
A New Fast Discrete Fourier Transform.
J. VLSI Signal Process., 1998

An RNS Montgomery Modular Multiplication Algorithm.
IEEE Trans. Computers, 1998

1997
On Radix Representation of Rings.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

An IWS Montgomery Modular Multiplication Algorithm.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

1995
MSB-First Digit Serial Arithmetic.
J. Univers. Comput. Sci., 1995

LCF: A Lexicagraphic Binary representation of the Rationals.
J. Univers. Comput. Sci., 1995

High Speed DCT/IDCT Using a Pipelined CORDIC Algorithm.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995

1994
A Systolic, Linear-Array Multiplier for a Class of Right-Shift Algorithms.
IEEE Trans. Computers, 1994

Digit-Set Conversions: Generalizations and Application.
IEEE Trans. Computers, 1994

1993
High-radix modular multiplication for cryptosystems.
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993

1991
A high-radix hardware algorithm for calculating the exponential M<sup>E</sup> modulo N.
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991

Semantics for exact floating point operations.
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991

1990
An Algorithm for Redundant Binary Bit-Pipelined Rational Arithmetic.
IEEE Trans. Computers, 1990

1989
Exploiting redundancy in bit-pipelined rational arithmetic.
Proceedings of the 9th Symposium on Computer Arithmetic, 1989

1988
An On-Line Arithmetic Unit for Bit-Pipelined Rational Arithmetic.
J. Parallel Distributed Comput., 1988

1987
A bit-serial arithmetic unit for rational arithmetic.
Proceedings of the 8th IEEE Symposium on Computer Arithmetic, 1987

1985
Finite Precision Rational Arithmetic Slash Number Systems.
IEEE Trans. Computers, 1985

Finite precision lexicographic continued fraction number systems.
Proceedings of the 7th IEEE Symposium on Computer Arithmetic, 1985

1983
Finite Precision Rational Arithmetic: An Arithmetic Unit.
IEEE Trans. Computers, 1983

Mapping Integers and Hensel Codes onto Farey Fractions.
BIT, 1983

An order preserving finite binary encoding of the rationals.
Proceedings of the 6th IEEE Symposium on Computer Arithmetic, 1983

1981
An integrated rational arithmetic unit.
Proceedings of the 5th IEEE Symposium on Computer Arithmetic, 1981

1980
Interpretation and Code Generation Based on Intermediate Languages.
Softw. Pract. Exp., 1980

Firmware Development Systems, a Survey.
Proceedings of the Firmware Engineering, 1980

1979
An approximate rational arithmetic system with intrinsic recovery of simple fractions during expression evaluation.
Proceedings of the Symbolic and Algebraic Computation, 1979

1978
A feasibility analysis of binary fixed-slash and floating-slash number systems.
Proceedings of the 4th IEEE Symposium on Computer Arithmetic, 1978

A feasibility analysis of fixed-slash rational arithmetic.
Proceedings of the 4th IEEE Symposium on Computer Arithmetic, 1978

1977
A Unified Numeric Representation Arithmetic Unit and Its Language Support.
IEEE Trans. Computers, 1977

1975
The UNRAU a Unified Numeric Representation Arithmetic Unit.
Proceedings of the 3rd IEEE Symposium on Computer Arithmetic, 1975

A unified numeric data type in Pascal.
Proceedings of the 3rd IEEE Symposium on Computer Arithmetic, 1975

1974
Concepts of the MATHILDA System.
Proceedings of the 2nd Annual Symposium on Computer Architecture, 1974


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