David J. Palframan

According to our database1, David J. Palframan authored at least 9 papers between 2011 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Scalpel: Customizing DNN Pruning to the Underlying Hardware Parallelism.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

2015
COP: to compress and protect main memory.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

iPatch: Intelligent fault patching to improve energy efficiency.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Online and Operand-Aware Detection of Failures Utilizing False Alarm Vectors.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2014
Precision-aware soft error protection for GPUs.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2013
Resilient High-Performance Processors with Spare RIBs.
IEEE Micro, 2013

2012
Mitigating random variation with spare RIBs: Redundant intermediate bitslices.
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks, 2012

2011
CRAM: coded registers for amplified multiporting.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

Time redundant parity for low-cost transient error detection.
Proceedings of the Design, Automation and Test in Europe, 2011


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