David Lo

Orcid: 0000-0002-2585-5473

Affiliations:
  • Google Inc., Mountain View, CA, USA
  • Stanford University, CA, USA


According to our database1, David Lo authored at least 14 papers between 2011 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2022
Enabling Practical Cloud Performance Debugging with Unsupervised Learning.
ACM SIGOPS Oper. Syst. Rev., 2022

Practical and Scalable ML-Driven Cloud Performance Debugging With Sage.
IEEE Micro, 2022

2021
Sage: Leveraging ML to Diagnose Unpredictable Performance in Cloud Microservices.
CoRR, 2021

Sage: Using Unsupervised Learning for Scalable Performance Debugging in Microservices.
CoRR, 2021

Sage: practical and scalable ML-driven performance debugging in microservices.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020
Thunderbolt: Throughput-Optimized, Quality-of-Service-Aware Power Capping at Scale.
Proceedings of the 14th USENIX Symposium on Operating Systems Design and Implementation, 2020

Autonomous Warehouse-Scale Computers.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Leveraging application classes to save power in highly-utilized data centers.
Proceedings of the SoCC '20: ACM Symposium on Cloud Computing, 2020

2019
Kelp: QoS for Accelerated Machine Learning Systems.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

2016
Improving Resource Efficiency at Scale with Heracles.
ACM Trans. Comput. Syst., 2016

2015
Heracles: improving resource efficiency at scale.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014
Towards energy proportionality for large-scale latency-critical workloads.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Dynamic management of TurboMode in modern multi-core chips.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2011
Dynamic Fine-Grain Scheduling of Pipeline Parallelism.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011


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