Luiz André Barroso

According to our database1, Luiz André Barroso authored at least 33 papers between 1991 and 2018.

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Awards

ACM Fellow

ACM Fellow 2010, "For contributions to multi-core computing, warehouse scale data-center architectures, and energy proportional computing.".

Timeline

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Bibliography

2018
The Datacenter as a Computer: Designing Warehouse-Scale Machines, Third Edition
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, 2018

2017
Attack of the killer microseconds.
Commun. ACM, 2017

2014
Towards energy proportionality for large-scale latency-critical workloads.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

2013
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines, Second Edition
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 9781627050104, 2013

The tail at scale.
Commun. ACM, 2013

2011
Warehouse-Scale Computing: Entering the Teenage Decade.
SIGARCH Computer Architecture News, 2011

FAWN: a fast array of wimpy nodes: technical perspective.
Commun. ACM, 2011

Power management of online data-intensive services.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

2010
Guest Editors' Introduction: Datacenter-Scale Computing.
IEEE Micro, 2010

Internet Predictions.
IEEE Internet Computing, 2010

2009
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, 2009

2007
The Case for Energy-Proportional Computing.
IEEE Computer, 2007

Warehouse-scale Computers.
Proceedings of the 2007 USENIX Annual Technical Conference, 2007

All watts considered.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Power provisioning for a warehouse-sized computer.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

Failure Trends in a Large Disk Drive Population.
Proceedings of the 5th USENIX Conference on File and Storage Technologies, 2007

2006
Warehouse-Sized Workloads.
Proceedings of the 2006 IEEE International Symposium on Workload Characterization, 2006

2005
The price of performance.
ACM Queue, 2005

2003
Web Search for a Planet: The Google Cluster Architecture.
IEEE Micro, 2003

2001
Code layout optimizations for transaction processing workloads.
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

2000
Piranha: a scalable architecture based on single-chip multiprocessing.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

Impact of Chip-Level Integration on Performance of OLTP Workloads.
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000

1998
An Analysis of Database Workload Performance on Simultaneous Multithreaded Processors.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

Memory System Characterization of Commercial Workloads.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors.
Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998

1995
Performance Evaluation of the Slotted Ring Multiprocessor.
IEEE Trans. Computers, 1995

RPM: A Rapid Prototyping Engine for Multiprocessor Systems.
IEEE Computer, 1995

The Design of RPM: An FPGA-based Multiprocessor Emulator.
Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995

1993
The Performance of Cache-Coherent Ring-based Multiprocessors.
Proceedings of the 20th Annual International Symposium on Computer Architecture, 1993

1992
A Methodology for Performance Evaluation of Parallel Applications on Multiprocessors.
J. Parallel Distrib. Comput., 1992

Scalability Problems in Multiprocessors with Private Caches.
Proceedings of the PARLE '92: Parallel Architectures and Languages Europe, 1992

1991
Delayed consistency and its effects on the miss rate of parallel programs.
Proceedings of the Proceedings Supercomputing '91, 1991

Cache Coherence on a Slotted Ring.
Proceedings of the International Conference on Parallel Processing, 1991


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