Davide Menin
Orcid: 0000-0002-8859-1073
  According to our database1,
  Davide Menin
  authored at least 5 papers
  between 2019 and 2023.
  
  
Collaborative distances:
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Bibliography
  2023
A Time-Domain Simulation Framework for the Modeling of Jitter in High-Speed Serial Interfaces.
    
  
    IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023
    
  
  2021
Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation.
    
  
    IEEE Trans. Very Large Scale Integr. Syst., 2021
    
  
  2020
Design and Simulation of a 12 Gb/s Transceiver With 8-Tap FFE, Offset-Compensated Samplers and Fully Adaptive 1-Tap Speculative/3-Tap DFE and Sampling Phase for MIPI A-PHY Applications.
    
  
    IEEE Trans. Circuits Syst. II Express Briefs, 2020
    
  
  2019
A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces.
    
  
    Proceedings of the 42nd International Convention on Information and Communication Technology, 2019
    
  
Automotive-Range Characterization of a 11 Gb/s Transceiver for Automotive Microcontroller Applications with 8-Tap FFE, 1-Tap Unrolled/3-Tap DFE and Offset-Compensated Samplers.
    
  
    Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019