Ahmed Elnaqib

Orcid: 0000-0002-9062-1606

According to our database1, Ahmed Elnaqib authored at least 5 papers between 2020 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A 0.5GHz 0.35mW LDO-Powered Constant-Slope Phase Interpolator With 0.22% INL.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Fully-Integrated 5mW, 0.8Gbps Energy-Efficient Chip-to-Chip Data Link for Ultra-Low-Power IoT End-Nodes in 65-nm CMOS.
CoRR, 2021

2020
An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020


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