Dejin Zhou

According to our database, Dejin Zhou authored at least 4 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 14-bit 1.25GS/s single-channel pipelined ADC with distributed differential reference voltage buffer and hybrid mixed-signal foreground and background calibration.

Zhenhai Chen, Cheng Jin, Xiaobo Su, Yindan Jiang, Dejin Zhou, Ruifang Tie, Danping Yang, Yan Xue, Hong Zhang, Yongshen Yin, Zongguang Yu

Microelectron. J., 2026

A 16-bit 210 MS/s pipelined ADC with distributed differential reference voltage buffer and foreground calibration.

Zhenhai Chen, Xiaobo Su, Yindan Jiang, Dejin Zhou, Ruifang Tie, Kun Li, Yan Xue, Zhang Hong, Yongshen Yin, Zongguang Yu

IEICE Electron. Express, 2026

2023

Design of a 5MHz half-bridge gate driver for GaN HEMTs with adaptive output current.

Liang Li, Dejin Zhou, Wei Huang, Ningye He, Yuan Xu, Rengxia Ning, Zhenhai Chen

IEICE Electron. Express, 2023

2022

A 20MHz 4A gate driver with 5.5 to 24V output drive voltage for wide bandgap FETs.

Dejin Zhou, Hongliang Lu, Shu Yuan, Ningye He, Yuan Xu, Rengxia Ning, Zhenhai Chen, Wei Huang

IEICE Electron. Express, 2022