Diksha Shekhawat

According to our database, Diksha Shekhawat authored at least 11 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

SHAKTI: Securing Hardware IPs by Cascade Gated Multiplexer-Based Logic Obfuscation.

Jugal Gandhi, Nikhil Handa, Abhay Nayak, Diksha Shekhawat, M. Santosh, Jaya Dofe, Jai Gopal Pandey

Proceedings of the 38th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems, 2025

DyLock: A Dynamic Key-based SAT and Structural Attacks Resilient Low-overhead Logic Locking.

Jugal Gandhi, Diksha Shekhawat, Jaya Dofe, Jai Gopal Pandey

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

Modeling, hardware architecture, and performance analyses of an AEAD-based lightweight cipher.

Kartik Jhawar, Jugal Gandhi, Diksha Shekhawat, Aniket Upadhyay, Avadh Harkishanka, Nitin Chaturvedi, M. Santosh, Jai Gopal Pandey

J. Real Time Image Process., April, 2024

SAT and SCOPE Attacks on Deceptive Multiplexer Logic Locking.

Jugal Gandhi, Rishi Agarwal, Anish Mall, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

Emerging Frontiers and Limitations of Logic Locking for Secure IC Design.

Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey

Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024

Large Language Model Driven Logic Locking: A Generative Approach to Secure IC Design.

Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jaya Dofe, Jai Gopal Pandey

Proceedings of the 33rd IEEE Asian Test Symposium, 2024

2023

Logic locking for IP security: A comprehensive analysis on challenges, techniques, and trends.

Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey

Comput. Secur., June, 2023

Security Evaluation of Lightweight SBoxes.

Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

PHAc: Posit Hardware Accelerator for Efficient Arithmetic Logic Operations.

Diksha Shekhawat, Jugal Gandhi, M. Santosh, Jai Gopal Pandey

Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

LOKI: A Secure FPGA Prototyping of IoT IP with Lightweight Logic Locking.

Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2021

A Hardware Generator for Posit Arithmetic and its FPGA Prototyping.

Diksha Shekhawat, Apoorva Jangir, Jai Gopal Pandey

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021