Jaya Dofe

According to our database, Jaya Dofe authored at least 31 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Internet of Things World: A New Security Perspective.

Jaya Dofe, Kriti Rai Saini

SN Comput. Sci., 2023

Automating Hardware Trojan Detection Using Unsupervised Learning: A Case Study of FPGA.

Shailesh Rajput, Jaya Dofe, Wafi Danesh

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Secure Dynamic PUF for IoT Security.

Shailesh Rajput, Jaya Dofe

Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023

Counteracting Modeling Attacks Using Hardware-Based Dynamic Physical Unclonable Function.

Shailesh Rajput, Jaya Dofe

Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2023

2022

Thermal Side-channel Leakage Protection in Monolithic Three Dimensional Integrated Circuits.

Jaya Dofe

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

Performance Comparison of Cryptosystems in Context to Internet of Things.

Kriti Rai Saini, Vinayak Jigajinni, Jaya Dofe

Proceedings of the 4th International Conference on Data Intelligence and Security, 2022

2021

Smart energy optimization for massive IoT using artificial intelligence.

Maulin Raval, Shubhendu Bhardwaj, Aparna Aravelli, Jaya Dofe, Hardik A. Gohel

Internet Things, 2021

LC-Physical Unclonable Function in Wireless 3D IC for Securing Internet of Things Devices.

Jaya Dofe, Wafi Danesh

Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

Unified Countermeasures against Physical Attacks in Internet of Things - A survey.

Jaya Dofe, Aaron Nguyen, Andy Nguyen

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

2020

Comprehensive Analysis on Hardware Trojans in 3D ICs: Characterization and Experimental Impact Assessment.

Zhiming Zhang, Jaya Dofe, Pruthvy Yellu, Qiaoyan Yu

SN Comput. Sci., 2020

Improving power analysis attack resistance using intrinsic noise in 3D ICs.

Zhiming Zhang, Jaya Dofe, Qiaoyan Yu

Integr., 2020

2019

SRASA: a Generalized Theoretical Framework for Security and Reliability Analysis in Computing Systems.

Lake Bu, Jaya Dofe, Qiaoyan Yu, Michel A. Kinsy

J. Hardw. Syst. Secur., 2019

2018

Hardware-Efficient Logic Camouflaging for Monolithic 3-D ICs.

Chen Yan, Jaya Dofe, Scott Kontak, Qiaoyan Yu, Emre Salman

IEEE Trans. Circuits Syst. II Express Briefs, 2018

Novel Dynamic State-Deflection Method for Gate-Level Design Obfuscation.

Jaya Dofe, Qiaoyan Yu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Investigating Reliability and Security of Integrated Circuits and Systems.

Qiaoyan Yu, Zhiming Zhang, Jaya Dofe

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Exploiting PDN noise to thwart correlation power analysis attacks in 3D ICs.

Jaya Dofe, Qiaoyan Yu

Proceedings of the 20th System Level Interconnect Prediction Workshop, 2018

2017

Exploiting hardware obfuscation methods to prevent and detect hardware Trojans.

Qiaoyan Yu, Jaya Dofe, Zhiming Zhang

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Analyzing security vulnerabilities of three-dimensional integrated circuits.

Jaya Dofe, Qiaoyan Yu

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

Mitigating Control Flow Attacks in Embedded Systems with Novel Built-in Secure Register Bank.

Sean Kramer, Zhiming Zhang, Jaya Dofe, Qiaoyan Yu

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Impact of Power Distribution Network on Power Analysis Attacks in Three-Dimensional Integrated Circuits.

Jaya Dofe, Zhiming Zhang, Qiaoyan Yu, Chen Yan, Emre Salman

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Security Threats and Countermeasures in Three-Dimensional Integrated Circuits.

Jaya Dofe, Peng Gu, Dylan C. Stow, Qiaoyan Yu, Eren Kursun, Yuan Xie

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

2016

A Comprehensive FPGA-Based Assessment on Fault-Resistant AES against Correlation Power Analysis Attack.

Jaya Dofe, Hoda Pahlevanzadeh, Qiaoyan Yu

J. Electron. Test., 2016

DSD: A Dynamic State-Deflection Method for Gate-Level Netlist Obfuscation.

Jaya Dofe, Yuejun Zhang, Qiaoyan Yu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Hardware security assurance in emerging IoT applications.

Jaya Dofe, Jonathan Frey, Qiaoyan Yu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Transistor-level camouflaged logic locking method for monolithic 3D IC security.

Jaya Dofe, Chen Yan, Scott Kontak, Emre Salman, Qiaoyan Yu

Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016

Hardware Security Threats and Potential Countermeasures in Emerging 3D ICs.

Jaya Dofe, Qiaoyan Yu, Hailang Wang, Emre Salman

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Assessing CPA resistance of AES with different fault tolerance mechanisms.

Hoda Pahlevanzadeh, Jaya Dofe, Qiaoyan Yu

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

Strengthening SIMON Implementation Against Intelligent Fault Attacks.

Jaya Dofe, Jonathan Frey, Hoda Pahlevanzadeh, Qiaoyan Yu

IEEE Embed. Syst. Lett., 2015

Investigating power characteristics of memristor-based logic gates and their applications in a security primitive.

Jaya Dofe, Jonathan Frey, Patrick Nsengiyumva, Qiaoyan Yu

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

Fault-tolerant methods for a new lightweight cipher SIMON.

Jaya Dofe, Connor Reed, Ning Zhang, Qiaoyan Yu

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2014

Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic.

Wafi Danesh, Jaya Dofe, Qiaoyan Yu

VLSI Design, 2014