Dileep Bhandarkar

According to our database, Dileep Bhandarkar authored at least 26 papers between 1973 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Performance analysis in the real world of on line services.

Dileep Bhandarkar

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

2003

Billion Transistor Chips in Mainstream Enterprise Platforms of the Future.

Dileep Bhandarkar

Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

2002

Parallelism in Mainstream Enterprise Platforms of the Future.

Dileep Bhandarkar

Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002

1997

RISC versus CISC: a tale of two chips.

Dileep Bhandarkar

SIGARCH Comput. Archit. News, 1997

Performance Characterization of the Pentium(r) Pro Processor.

Dileep Bhandarkar, Jianxun Jason Ding

Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

1996

Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads.

Zarka Cvetanovic, Dileep Bhandarkar

Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996

Alpha implementations and architecture - complete reference and guide.

Dileep Bhandarkar

Digital Press, ISBN: 978-1-55558-130-5, 1996

1994

Characterization of Alpha AXP Performance Using TP and SPEC Workloads.

Zarka Cvetanovic, Dileep Bhandarkar

Proceedings of the 21st Annual International Symposium on Computer Architecture. Chicago, 1994

1991

Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization.

Dileep Bhandarkar, Douglas W. Clark

Proceedings of the ASPLOS-IV Proceedings, 1991

1990

VAX Vector Architecture.

Dileep Bhandarkar, Richard Brunner

Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

High performance issue oriented architecture.

Dileep Bhandarkar, David A. Orbits, Richard T. Witek, Wayne M. Cardoza, David N. Cutler

Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

Vector extensions to the VAX architecture.

Dileep Bhandarkar, Richard Brunner

Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

1987

VAX 8800 System Overview.

Don McInnis, B. Kusik, Dileep Bhandarkar

Proceedings of the COMPCON'87, 1987

1982

Architecture Management for Ensuring Software Compatibility in the VAX Family of Computers.

Dileep Bhandarkar

Computer, 1982

1981

Design Trade-Offs in VAX-11 Translation Buffer Organization.

Mahadev Satyanarayanan, Dileep Bhandarkar

Computer, 1981

1980

VAX floating point: a solid foundation for numerical computation.

Mary Payne, Dileep Bhandarkar

SIGARCH Comput. Archit. News, 1980

1979

CCD Charge-Coupled Device Memories: A Perspective.

Dileep Bhandarkar, J. Brock Barton, A. F. Tasch Jr.

Computer, 1979

Special Feature the Impact Of Semiconductor Technology on Computer Systems.

Dileep Bhandarkar

Computer, 1979

1978

Semiconductor technology: trends and implications.

Dileep P. Bhandarkar, J. Egil Juliussen

SIGARCH Comput. Archit. News, 1978

1977

Some Performance Issues in Multiprocessor System Design.

Dileep Bhandarkar

IEEE Trans. Computers, 1977

1975

On the Performance of Magnetic Bubble Memories in Computer Systems.

Dileep Bhandarkar

IEEE Trans. Computers, 1975

Analysis of Memory Interference in Multiprocessors.

Dileep Bhandarkar

IEEE Trans. Computers, 1975

A practical application of memory interference models.

Dileep P. Bhandarkar

SIGMETRICS Perform. Evaluation Rev., 1975

Tutorial: Computer System Advantages of Magnetic Bubble Memories.

Dileep Bhandarkar, Egil Juliussen

Computer, 1975

A comparative evaluation of the cost effectiveness of computer systems (Paper Session).

Dileep P. Bhandarkar, J. Egil Juliussen

Proceedings of the 1975 ACM Annual Conference, 1975

1973

Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems.

Dileep Bhandarkar, Samuel H. Fuller

Proceedings of the 1st Annual Symposium on Computer Architecture, 1973