Ding-Yuan Lee

According to our database, Ding-Yuan Lee authored at least 6 papers between 2015 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor.

Ding-Yuan Lee, Ching-Che Wang, An-Yeu Wu

IEEE Trans. Very Large Scale Integr. Syst., 2019

A Programmable and FPGA-accelerated GTP Offloading Engine for Mobile Edge Computing in 5G Networks.

Chung-An Shen, Ding-Yuan Lee, Chung-An Ku, Meng-Wei Lin, Kuo-Cheng Lu, Shao-Yu Tan

Proceedings of the IEEE INFOCOM 2019, 2019

2018

Dynamically Updatable Ternary Segmented Aging Bloom Filter for OpenFlow-Compliant Low-Power Packet Processing.

Sheng-Chun Kao, Ding-Yuan Lee, Ting-Sheng Chen, An-Yeu Wu

IEEE/ACM Trans. Netw., 2018

2017

Low-latency Voltage-Racing Winner-Take-All (VR-WTA) circuit for acceleration of learning engine.

Chia-Heng Wu, Ting-Sheng Chen, Ding-Yuan Lee, Tsung-Te Liu, An-Yeu Wu

Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

2016

Dynamic Reconfigurable Ternary Content Addressable Memory for OpenFlow-Compliant Low-Power Packet Processing.

Ting-Sheng Chen, Ding-Yuan Lee, Tsung-Te Liu, An-Yeu Wu

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

2015

An algorithmic error-resilient scheme for robust LDPC decoding.

Huai-Ting Li, Ding-Yuan Lee, Kun-Chih Chen, An-Yeu Andy Wu

Proceedings of the VLSI Design, Automation and Test, 2015