Dongzhu Li
Orcid: 0009-0006-3944-6503
According to our database1,
Dongzhu Li
authored at least 6 papers
between 2023 and 2025.
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Bibliography
2025
Analysis and Design of Coarse and Fine Segmented LUT Implementation for FPGA-Based Resource Efficient Wired-Logic DNN Processors.
IEICE Trans. Electron., 2025
13.6 A Via-Programmable DNN-Processor Fabrication Toward 1/40<sup>th</sup> Mask Cost.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
A Coarse- and Fine-Grained LUT Segmentation Method Enabling Single FPGA Implementation of Wired-Logic DNN Processor.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
2024
A 0.13mJ/Prediction CIFAR-100 Fully Synthesizable Raster-Scan-Based Wired-Logic Processor in 16-nm FPGA.
IEICE Trans. Electron., 2024
Efficient FPGA Resource Utilization in Wired-Logic Processors Using Coarse and Fine Segmentation of LUTs for Non-Linear Functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023