Dror Lazar

According to our database, Dror Lazar authored at least 4 papers between 2008 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2024

7.2 A 224Gb/s sub pJ/b PAM-4 and PAM-6 DAC-Based Transmitter in 3nm FinFET.

Marco Cusmai, Noam Familia, Elad Kuperberg, Mohammad Nashash, Dovid Gottesman, Daljeet Kumar, Zvi Marcus, Yeshayahu Horwitz, Sagi Zalcman, Jihwan Kim, Sandipan Kundu, Ilia Radashkevich, Yoav Segal, Dror Lazar, Udi Virobnik, Mike Peng Li, Ariel Cohen

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels.

Ahmad Khairi, Yoel Krupnik, Amir Laufer, Yoav Segal, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Sabag, Vitali Rahinski, Idan Lotan, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky Grafi, Udi Virobnik, Dror Lazar, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo, Peng Mike Li, Frank O'Mahony, Ariel Cohen

IEEE J. Solid State Circuits, 2023

2022

Design Techniques of High Speed PHY using Highly compact FOVEROS Through Silicon Via.

Sanjib Basu, Dror Lazar, Rupesh Pothineni

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2008

An adaptive 4-tap analog FIR equalizer for 10-Gb/s over backplane serial link receiver.

Ori Eshet, Adee Ran, Amir Mezer, Yaniv Hadar, Dror Lazar, Miki Moyal

Proceedings of the ESSCIRC 2008, 2008