Samuel Palermo
Orcid: 0000-0002-6555-1474
According to our database1,
Samuel Palermo
authored at least 100 papers
between 2007 and 2024.
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Bibliography
2024
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2023
A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET.
IEEE J. Solid State Circuits, March, 2023
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
A 38-GS/s 7-bit Pipelined-SAR ADC With Speed- Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET.
IEEE J. Solid State Circuits, 2023
A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels.
IEEE J. Solid State Circuits, 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
LLM: Realizing Low-Latency Memory by Exploiting Embedded Silicon Photonics for Irregular Workloads.
Proceedings of the High Performance Computing - 37th International Conference, 2022
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
Proceedings of the 19th International SoC Design Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
A 38GS/s 7b Time-Interleaved Pipelined-SAR ADC with Speed-Enhanced Bootstrapped Switch in 22nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
External Modulator-Based Automatic Tuning of Reconfigurable Silicon Photonic 4<sup>th</sup>-Order APF-based Pole/Zero Filters.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2021
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021
2020
A 32-Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver With Adaptive Echo Cancellation Techniques.
IEEE J. Solid State Circuits, 2020
A 22 Gb/s Directly Modulated Optical Injection-Locked Quantum-Dot Microring Laser Transmitter with Integrated CMOS Driver.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.
IEEE J. Solid State Circuits, 2019
Introduction to the Special Section on the 2018 Custom Integrated Circuits Conference.
IEEE J. Solid State Circuits, 2019
A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS.
IEEE J. Solid State Circuits, 2019
A Directly Modulated Quantum Dot Microring Laser Transmitter with Integrated CMOS Driver.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019
Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture : (Invited Special Session Paper).
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
A 32 Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver with Adaptive Echo Cancellation in 28nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
IEEE J. Solid State Circuits, 2018
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
A 3D-Integrated 56 Gb/s NRZ/PAM4 Reconfigurable Segmented Mach-Zehnder Modulator-Based Si-Photonics Transmitter.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018
2017
IEEE J. Solid State Circuits, 2017
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS.
IEEE J. Solid State Circuits, 2017
A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage.
IEEE J. Solid State Circuits, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2016
A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization.
IEEE J. Solid State Circuits, 2016
A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization.
IEEE J. Solid State Circuits, 2016
IEEE Commun. Mag., 2016
2015
A Wide-Band Fully-Integrated CMOS Ring-Oscillator PLL-Based Complex Dielectric Spectroscopy System.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS.
IEEE J. Solid State Circuits, 2015
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the Symposium on VLSI Circuits, 2015
A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique.
Proceedings of the Symposium on VLSI Circuits, 2015
25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Energy efficiency comparisons of NRZ and PAM4 modulation for ring-resonator-based silicon photonic links.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications.
IEEE J. Solid State Circuits, 2014
An 8-16 Gb/s, 0.65-1.05 pJ/b, Voltage-Mode Transmitter With Analog Impedance Modulation Equalization and Sub-3 ns Power-State Transitioning.
IEEE J. Solid State Circuits, 2014
Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS.
IEEE J. Solid State Circuits, 2014
IEEE Des. Test, 2014
A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014
A 0.18-μm CMOS fully integrated 0.7-6 GHz PLL-based complex dielectric spectroscopy system.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
A Design Methodology for Power Efficiency Optimization of High-Speed Equalized-Electrical I/O Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2013
Sequential Correlated Level Shifting: A Switched-Capacitor Approach for High-Accuracy Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
IEEE J. Solid State Circuits, 2013
IEEE J. Solid State Circuits, 2013
A Low-Power 26-GHz Transformer-Based Regulated Cascode SiGe BiCMOS Transimpedance Amplifier.
IEEE J. Solid State Circuits, 2013
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
A 6-Gbit/s Hybrid Voltage-Mode Transmitter With Current-Mode Equalization in 90-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2012
Microelectron. J., 2012
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking.
IEEE J. Solid State Circuits, 2012
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
LumiNOC: a power-efficient, high-performance, photonic network-on-chip for future parallel architectures.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2011
Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
J. Electr. Comput. Eng., 2011
Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
IEEE Trans. Circuits Syst. II Express Briefs, 2010
IEEE Commun. Mag., 2010
2008
IEEE J. Solid State Circuits, 2008
2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007