Dustin Peterson

According to our database1, Dustin Peterson authored at least 10 papers between 2013 and 2019.

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Bibliography

2019
Power-Gating Models for Rapid Design Exploration.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Fully-automated synthesis of power management controllers from UPF.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Detecting non-functional circuit activity in SoC designs.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2016
Neues Konzept zur Steigerung der Zuverlässigkeit einer ARM-basierten Prozessorarchitektur unter Verwendung eines CGRAs.
Proceedings of the 19th GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2016

SMoSi: A framework for the derivation of sleep mode traces from RTL simulations.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
End-to-Display Encryption: A Pixel-Domain Encryption with Security Benefit.
Proceedings of the 3rd ACM Workshop on Information Hiding and Multimedia Security, 2015

Spatial and temporal granularity limits of body biasing in UTBB-FDSOI.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2013
StML: Bridging the gap between FPGA design and HDL circuit description.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Testing reliability techniques for SoCs with fault tolerant CGRA by using live FPGA fault injection.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

A Fast and Accurate FPGA-Based Fault Injection System.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013


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