Thomas Schweizer
According to our database1,
Thomas Schweizer
authored at least 27 papers
between 2004 and 2020.
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Bibliography
2020
Proceedings of the 20th IEEE International Working Conference on Source Code Analysis and Manipulation, 2020
2016
Eine Tcl-basierte Methode zur Fehlerinjektion und Fehlereffektsimulation/-emulation auf Xilinx-FPGAs.
Proceedings of the 19th GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2016
Neues Konzept zur Steigerung der Zuverlässigkeit einer ARM-basierten Prozessorarchitektur unter Verwendung eines CGRAs.
Proceedings of the 19th GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2016
2015
it Inf. Technol., 2015
2014
Rotated parallel mapping: A novel approach for mapping data parallel applications on CGRAs.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
2013
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013
Testing reliability techniques for SoCs with fault tolerant CGRA by using live FPGA fault injection.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013
2012
Using Run-Time Reconfiguration to Implement Fault-Tolerant Coarse Grained Reconfigurable Architectures.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012
2011
Runtime-datapath-remapping for fault-tolerant coarse-grained reconfigurable architectures.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
2010
Verfahren und Schaltkreis zur Ladungswiederverwendung in Schaltungen mit mehrfacher und abschaltbarer Spannungsversorgung.
PhD thesis, 2010
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
CGADL: An Architecture Description Language for Coarse-Grained Reconfigurable Arrays.
IEEE Trans. Very Large Scale Integr. Syst., 2009
Prevention of Hot Spot Development on Coarse-Grained Dynamically Reconfigurable Architectures.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009
2008
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008
2007
CRC - Concepts and Evaluation of Processor-Like Reconfigurable Architectures (CRC - Konzepte und Bewertung prozessorartig rekonfigurierbarer Architekturen).
it Inf. Technol., 2007
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007
2006
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006
2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2004
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004