Elham Safi

According to our database1, Elham Safi authored at least 9 papers between 2003 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
Two-Stage, Pipelined Register Renaming.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2010
On the Latency and Energy of Checkpointed Superscalar Register Alias Tables.
IEEE Trans. Very Large Scale Integr. Syst., 2010

2009
A physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

2008
L-CBF: A Low-Power, Fast Counting Bloom Filter Architecture.
IEEE Trans. Very Large Scale Integr. Syst., 2008

A physical level study and optimization of CAM-based checkpointed register alias table.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

2007
A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

On the latency, energy and area of checkpointed, superscalar register alias tables.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

2003
Processor Testing Using an ADL Description and Genetic Algorithms.
Proceedings of the IFIP VLSI-SoC 2003, 2003

Utilizing Various ADL Facets for Instruction Level CPU Test.
Proceedings of the Fourth International Workshop on Microprocessor Test and Verification, 2003


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