Angela Arapoyanni

According to our database, Angela Arapoyanni authored at least 61 papers between 1999 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Timing Error Tolerance in Small Core Designs for SoC Applications.

Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni

IEEE Trans. Computers, 2016

Timing error mitigation in microprocessor cores.

Stefanos Valadimas, Angela Arapoyanni, Yiorgos Tsiatouhas

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

A current monitoring technique for I_DDQ testing in digital integrated circuits.

Sotirios Matakias, Yiorgos Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis

Integr., 2015

Scan chain based at-speed diagnosis in the presence of scan output compaction schemes.

Helen-Maria Dounavi, Yiorgos Tsiatouhas, Angela Arapoyanni

Proceedings of the 19th Panhellenic Conference on Informatics, 2015

On the reuse of existing error tolerance circuitry for low power scan testing.

Anthi Anastasiou, Yiorgos Tsiatouhas, Angela Arapoyanni

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Fast deployment of alternate analog test using Bayesian model fusion.

John Liaperdos, Haralampos-G. D. Stratigopoulos, Louay Abdallah, Yiorgos Tsiatouhas, Angela Arapoyanni, Xin Li

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A method for the estimation of defect detection probability of analog/RF defect-oriented tests.

John Liaperdos, Angela Arapoyanni, Yiorgos Tsiatouhas

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

The Time Dilation Technique for Timing Error Tolerance.

Stefanos Valadimas, Andreas Floros, Yiorgos Tsiatouhas, Angela Arapoyanni, Xrysovalantis Kavousianos

IEEE Trans. Computers, 2014

Timing Error Tolerance in Pipeline Based Core Designs.

Stefanos Valadimas, Angela Arapoyanni

Proceedings of the 18th Panhellenic Conference on Informatics, 2014

2013

A Built-In Voltage Measurement Technique for the Calibration of RF Mixers.

John Liaperdos, Angela Arapoyanni, Yiorgos Tsiatouhas

IEEE Trans. Instrum. Meas., 2013

Adjustable RF Mixers' Alternate Test Efficiency Optimization by the Reduction of Test Observables.

John Liaperdos, Angela Arapoyanni, Y. Tsiatouhas

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Effective Timing Error Tolerance in Flip-Flop Based Core Designs.

Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni, Petros Xarchakos

J. Electron. Test., 2013

NBTI aging tolerance in pipeline based designs NBTI.

Katerina Katsarou, Yiorgos Tsiatouhas, Angela Arapoyanni

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012

Testing wireless transceivers' RF front-ends utilizing defect-oriented BIST techniques.

Lampros Dermentzoglou, John Liaperdos, Angela Arapoyanni, Yiorgos Tsiatouhas

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Cost and power efficient timing error tolerance in flip-flop based microprocessor cores.

Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni

Proceedings of the 17th IEEE European Test Symposium, 2012

Single event upset tolerance in flip-flop based microprocessor cores.

Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni, Adrian Evans

Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

2010

A Built-In-Test Circuit for RF Differential Low Noise Amplifiers.

Lambros Dermentzoglou, Angela Arapoyanni, Yiorgos Tsiatouhas

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Timing error tolerance in nanometer ICs.

Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

A Build-In Self-Test technique for RF Mixers.

Lambros Dermentzoglou, Angela Arapoyanni, Yiorgos Tsiatouhas

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2008

A Current Mode, Parallel, Two-Rail Code Checker.

Sotirios Matakias, Yiorgos Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni

IEEE Trans. Computers, 2008

Reliability and defectivity comparison of n- and p-channel SLS ELA polysilicon TFTs fabricated with a novel crystallization technique.

Despina C. Moschou, M. A. Exarchos, Dimitrios N. Kouvatsos, George J. Papaioannou, Aggeliki Arapoyanni, Apostolos T. Voutsas

Microelectron. Reliab., 2008

2007

On the latency, energy and area of checkpointed, superscalar register alias tables.

Elham Safi, Patrick Akl, Andreas Moshovos, Andreas G. Veneris, Aggeliki Arapoyanni

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

A Scan Flip-Flop for Low-Power Scan Operation.

Yiorgos Tsiatouhas, Angela Arapoyanni, Dionisis Skias

Proceedings of the 14th IEEE International Conference on Electronics, 2007

An Embedded Test Circuit for RF Single Ended Low Noise Amplifiers.

Lampros Dermentzoglou, Anastasios Karagounis, Aggeliki Arapoyanni, Yiorgos Tsiatouhas

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006

A Design Technique for Energy Reduction in NORA CMOS Logic.

Konstantinos Limniotis, Yiorgos Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

High fan-in differential current mirror logic.

Y. Tsiatouhas, Angela Arapoyanni

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Pipeline Architecture Incorporating a Low-Cost Error Detection and Correction Mechanism.

Andreas Floros, Yiorgos Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

A Built-In Self-Test Scheme for Differential Ring Oscillators.

Lampros Dermentzoglou, Y. Tsiatouhas, Angela Arapoyanni

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Fast, Parallel Two-Rail Code Checker with Enhanced Testability.

Sotirios Matakias, Y. Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni, Aristides Efthymiou

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

An embedded IDDQ testing circuit and technique.

Sotirios Matakias, Yiorgos Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis

Proceedings of the 12th IEEE International Conference on Electronics, 2005

A built-in I_DDQ testing circuit.

Sotirios Matakias, Yiorgos Tsiatouhas, Angela Arapoyanni, Th. Haniotakis, Guillaume Prenat, Salvador Mir

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs.

Sotirios Matakias, Y. Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis

J. Electron. Test., 2004

A Design for Testability Scheme for CMOS LC-Tank Voltage Controlled Oscillators.

Lampros Dermentzoglou, Y. Tsiatouhas, Angela Arapoyanni

J. Electron. Test., 2004

Ultra Fast and Low Cost Parallel Two-Rail Code Checker Targeting High Fan-In Applications .

Sotirios Matakias, Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

2003

An Embedded IDDQ Testing Architecture and Technique.

Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

A Sense Amplifier Based Circuit for Concurrent Detection of Soft and Timing Errors in CMOS ICs.

Y. Tsiatouhas, Sotirios Matakias, Angela Arapoyanni, Th. Haniotakis

Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

A low power NORA circuit design technique based on charge recycling.

Yiorgos Tsiatouhas, Konstantinos Limniotis, Angela Arapoyanni, Themistoklis Haniotakis

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Building blocks for a 100 MS/s, 10-b, 1.8 V CMOS cascaded folding & interpolating A/D converter.

Christos Kokozidis, Stamatis Bouras, Angela Arapoyanni

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

A novel scheme for testing radio frequency voltage controlled oscillators.

Lampros Dermentzoglou, Yiorgos Tsiatouhas, Angela Arapoyanni

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002

Charge Pump Circuits for Low-voltage Applications.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

VLSI Design, 2002

Analog-to-Digital Interface for Heterodyne Receivers.

Aristodemos Pnevmatikakis, Lampros Dermentzoglou, Aggeliki Arapoyanni

J. Circuits Syst. Comput., 2002

A new technique for IDDQ testing in nanometer technologies.

Y. Tsiatouhas, Yiannis Moisiadis, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni

Integr., 2002

Extending the Viability of IDDQ Testing in the Deep Submicron Era.

Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

SRAM oriented memory sense amplifier design in 0.18 μm CMOS technology.

A. Chrisanthopoulos, Y. Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A Hierarchical Architecture for Concurrent Soft Error Detection Based on Current Sensing.

Y. Tsiatouhas, Angela Arapoyanni, Dimitris Nikolos, Th. Haniotakis

Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

An extra low noise 1.8 GHz voltage controlled oscillator in 0.35 SiGe BiCMOS technology.

Lampros Dermentzoglou, George Kamoulakos, Aggeliki Arapoyanni

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001

A high-performance low-power static differential double edge-triggered flip-flop.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni, Lampros Dermentzoglou

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A CMOS differential logic for low-power and high-speed applications.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A 0.35 μm SiGe BiCMOS front end for GSM low IF cellular receiver applications.

Lampros Dermentzoglou, George Kamoulakos, Angela Arapoyanni

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

A new flash memory sense amplifier in 0.18 μm CMOS technology.

A. Chrisanthopoulos, Yiannis Moisiadis, A. Varagis, Y. Tsiatouhas, Angela Arapoyanni

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

New test pattern generation units for NPSF oriented memory built-in self test.

A. Chrisanthopoulos, Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000

Management of charge pump circuits.

George Kamoulakos, A. Chrisanthopoulos, Y. Tsiatouhas, Angela Arapoyanni

Integr., 2000

A CMOS charge pump for low voltage operation.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A high speed low power CMOS clock driver using charge recycling technique.

Ilias Bouras, Yiannis Liaperdos, Angela Arapoyanni

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A state assignment algorithm for finite state machines.

Dionisis Skias, Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni

Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

High performance level restoration circuits for low-power reduced-swing interconnect schemes.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

A multimode extra high IF1 image rejection receiver for TDMA applications.

Lampros Dermentzoglou, Aristodimos Pneumatikakis, Angela Arapoyanni, Yiannis Moisiadis

Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

A test pattern generation unit for memory NPSF built-in self test.

A. Chrisanthopoulos, George Kamoulakos, Y. Tsiatouhas, Angela Arapoyanni

Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

A Versatile Built-In Self-Test Scheme for Delay Fault Testing.

Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni, Dimitris Nikolos

Proceedings of the 2000 Design, 2000

1999

Performance comparison of driver architectures in submicron CMOS and BiCMOS technologies for low voltage operation.

Ioannis Moisiadis, Ilias Bouras, Constantin Papadas, Angela Arapoyanni

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Novel domino logic designs.

Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999