Enrico Zelioli

According to our database, Enrico Zelioli authored at least 4 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Work-In-Progress: Accelerating Numpy With OpenBLAS For Open-Source RISC-V Chips.

Cyril Koenig, Enrico Zelioli, Frank K. Gürkaynak, Luca Benini

CoRR, April, 2025

Evaluating IOMMU-Based Shared Virtual Addressing for RISC-V Embedded Heterogeneous SoCs.

Cyril Koenig, Enrico Zelioli, Luca Benini

Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024

Culsans: An Efficient Snoop-based Coherency Unit for the CVA6 Open Source RISC-V application processor.

Riccardo Tedeschi, Luca Valente, Gianmarco Ottavi, Enrico Zelioli, Nils Wistoff, Massimiliano Giacometti, Abdul Basit Sajjad, Luca Benini, Davide Rossi

CoRR, 2024

vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality Systems.

Enrico Zelioli, Alessandro Ottaviano, Robert Balas, Nils Wistoff, Angelo Garofalo, Luca Benini

Proceedings of the 42nd IEEE International Conference on Computer Design, 2024