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Farhad Ebrahimi-Azandaryani

Orcid: 0000-0002-2991-2471

Affiliations:
  • University of Erlangen-Nuremberg, Friedrich-Alexander-Universitäät Erlangen-Nürnberg (FAU), Germany
  • University of Tehran, School of Electrical and Computer Engineering, College of Engineering, Iran (former)


According to our database1, Farhad Ebrahimi-Azandaryani authored at least 5 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
CSD-Driven Speedup in RISC-V Processor.
[BibTeX]
[DOI]
Farhad EbrahimiAzandaryani
,
Dietmar Fey
Proceedings of the Design and Architecture for Signal and Image Processing, 2025

FPGA Implementation of a Real-Time Application Based on RISC-V Cores.
[BibTeX]
[DOI]
Amr Abdelhafez
,
Farhad EbrahimiAzandaryani
,
Maurizio Bianconi
,
Dietmar Fey
Proceedings of the 22nd IEEE International Multi-Conference on Systems, Signals & Devices, 2025

2024
ExTern: Boosting RISC-V core performance using ternary encoding.
[BibTeX]
[DOI]
Farhad Ebrahimi-Azandaryani
,
Dietmar Fey
Microprocess. Microsystems, 2024

2023
Accuracy Configurable Adders with Negligible Delay Overhead in Exact Operating Mode.
[BibTeX]
[DOI]
Farhad Ebrahimi-Azandaryani
,
Omid Akbari
,
Mehdi Kamal
,
Ali Afzali-Kusha
,
Massoud Pedram
ACM Trans. Design Autom. Electr. Syst., January, 2023

2020
Block-Based Carry Speculative Approximate Adder for Energy-Efficient Applications.
[BibTeX]
[DOI]
Farhad Ebrahimi-Azandaryani
,
Omid Akbari
,
Mehdi Kamal
,
Ali Afzali-Kusha
,
Massoud Pedram
IEEE Trans. Circuits Syst. II Express Briefs, 2020


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