Fotis C. Plessas

Orcid: 0000-0002-7735-3520

According to our database1, Fotis C. Plessas authored at least 12 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2023
A Survey on RISC-V-Based Machine Learning Ecosystem.
Inf., February, 2023

2021
Hardware Trojan Classification at Gate-level Netlists based on Area and Power Machine Learning Analysis.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

2020
Conventional and machine learning approaches as countermeasures against hardware trojan attacks.
Microprocess. Microsystems, 2020

2019
Power Detector Based On Voltage Squaring.
Proceedings of the 42nd International Conference on Telecommunications and Signal Processing, 2019

Ultra Low-Voltage Current Squaring and Multiplier.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Linear Current-to-Time Converter.
Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019

2018
A 76-84 GHz CMOS 4× Subharmonic Mixer With Internal Phase Correction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A high accuracy voltage reference generator.
Microelectron. J., 2018

2016
Phase Interpolator with Improved Linearity.
Circuits Syst. Signal Process., 2016

2015
A 5-Gbps USB3.0 transmitter and receiver linear equalizer.
Int. J. Circuit Theory Appl., 2015

2013
A variable gain wideband CMOS low-noise amplifier for 75 MHz-3 GHz wireless receivers.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2011
A 60-GHz quadrature PLL in 90nm CMOS.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011


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