Michael K. Birbas

According to our database1, Michael K. Birbas authored at least 47 papers between 1991 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
Deep CNN Sparse Coding for Real Time Inhaler Sounds Classification.
Sensors, 2020

Deep Embedded Vision Using Sparse Convolutional Neural Networks.
ERCIM News, 2020

A Hybrid Cyber Physical Digital Twin Approach for Smart Grid Fault Prediction.
Proceedings of the IEEE Conference on Industrial Cyberphysical Systems, 2020

2019
Low-complexity LDPC-convolutional codes based on cyclically shifted identity matrices.
Int. J. Inf. Commun. Technol., 2019

Design and Implementation of an APSoC-Based Robotic System with Motion Tracking Teleoperation.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Assessment of medication adherence in respiratory diseases through deep sparse convolutional coding.
Proceedings of the 24th IEEE International Conference on Emerging Technologies and Factory Automation, 2019

2018
Employing Savitzky-Golay Smoothing in a Low Cost eHealth Platform.
Proceedings of the 41st International Conference on Telecommunications and Signal Processing, 2018

Power saving issues in a low cost eHealth sensor controller.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Computationally efficient representation of energy grid-cyber physical system.
Proceedings of the IEEE Industrial Cyber-Physical Systems, 2018

FPGA-Assisted Distribution Grid Simulator.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
Compressing and Filtering Medical Data in a Low Cost Health Monitoring System.
Proceedings of the 21st Pan-Hellenic Conference on Informatics, 2017

Evaluation of Sensors' Precision in a Low Cost e-Health Monitoring System.
Proceedings of the 8th International Conference on Information and Communication Technologies in Agriculture, 2017

2016
Pilot-Less Time Synchronization for OFDM Systems: Application to Power Line Receivers.
Int. J. Distributed Sens. Networks, 2016

2015
A 5-Gbps USB3.0 transmitter and receiver linear equalizer.
Int. J. Circuit Theory Appl., 2015

Precision and power issues in a medical sensor controller.
Proceedings of the 19th Panhellenic Conference on Informatics, 2015

The Front End Design of a Health Monitoring System.
Proceedings of the 7th International Conference on Information and Communication Technologies in Agriculture, 2015

2014
Reduced complexity rate-matching/de-matching architecture for the LTE turbo code.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

On the construction of LDPC convolutional code ensembles based on permuted circulant unit matrices.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2012
A sub-1V supply CMOS voltage reference generator.
Int. J. Circuit Theory Appl., 2012

A 1 GHz, DDR2/3 SSTL driver with On-Die Termination, strength calibration, and slew rate control.
Comput. Electr. Eng., 2012

2011
A 1 V CMOS programmable accurate charge pump with wide output voltage range.
Microelectron. J., 2011

Advanced calibration techniques for high-speed source-synchronous interfaces.
IET Comput. Digit. Tech., 2011

Next generation millimeter wave backhaul radio: Overall system design for GbE 60GHz PtP wireless radio of high CMOS integration.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Digital baseband challenges for a 60GHz gigabit link.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
An ultra low area asynchronous combo 4/8/12-bit/quaternary A/D converter based on integer division.
Microelectron. J., 2010

Selecting appropriate calibration points for an ultra low area 8-bit subrange ADC.
Proceedings of the 8th Workshop on Intelligent Solutions in Embedded Systems, 2010

An 8-Bit Voltage Mode Analog to Digital Converter Based on Integer Division.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

A Novel 1.8 V, 1066 Mbps, DDR2, DFI-Compatible, Memory Interface.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

A dynamic DFI-compatible strobe qualification system for Double Data Rate (DDR) physical interfaces.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Localization of a Target with Three Degrees of Freedom Using a Low Cost Wireless Infrared Sensor Network.
Wirel. Sens. Netw., 2009

Analogue current quantizer architectures for implementing integer division-like functions.
Proceedings of the 16th International Conference on Digital Signal Processing, 2009

Asynchronous Combo 4/8/12bit, 140MS/s, 0.12mm<sup>2</sup> ADC with Binary Tree Structure.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2009

Calibration Method for a CMOS 0.06mm<sup>2</sup> 150MS/s 8-bit ADC.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Use of interleaving and error correction to infrared patterns for the improvement of position estimation systems.
Proceedings of 13th IEEE International Conference on Emerging Technologies and Factory Automation, 2008

2005
Heterogeneous system level co-simulation for the design of telecommunication systems.
J. Syst. Archit., 2005

2004
A Heterogeneous Co-simulation Environment for Complex Embedded Telecommunication Systems.
Proceedings of the Forum on specification and Design Languages, 2004

2003
Hardware/Software Co-Design of Complex Embedded Systems: An Approach Using Efficient Process Models, Multiple Formalism Specification and Validation via Co-Simulation.
Des. Autom. Embed. Syst., 2003

2001
A mapping algorithm for computer-assisted exploration in the design of embedded systems.
ACM Trans. Design Autom. Electr. Syst., 2001

1998
Simulating Hardware, Software and Electromechanical Parts Using Communicating Simulators.
Des. Autom. Embed. Syst., 1998

Reusable Architecture Templates and Automatic Specification Mapping for the Efficient Implementation of ATM Protocols.
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998

Hardware - Software Co-design of embedded telecommunication systems using multiple formalisms for application development.
Proceedings of the Formal Description Techniques and Protocol Specification, 1998

1996
Object oriented prototyping at the system level: an image reconstruction application example.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996

1994
Hardware programming using C++.
Microprocess. Microprogramming, 1994

A reconfigurable DSP board based on CORDIC elements.
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994

Near-Lossless Compression of Continuous-Tone Still Images Using Fuzzy Logic Notions and the Binary Arithmetic Coder (Q-Coder).
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A CAD Tool for the Development of an Extra-Fast Fuzzy Logic Controller Based on FPGAs and Memory Modules.
Proceedings of the Field-Programmable Logic, 1994

1991
Direct mapping of nested loops on piecewise regular processor arrays.
Proceedings of the Algorithms and Parallel VLSI Architectures II, 1991


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