Alexios N. Birbas

Orcid: 0000-0002-9468-7215

Affiliations:
  • University of Patras, Greece


According to our database1, Alexios N. Birbas authored at least 43 papers between 1994 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Holistic System Modelling and Analysis for Energy-Aware Production: An Integrated Framework.
Syst., February, 2023

Cloud-Edge Architecture With Virtualized Hardware Functionality for Real-Time Diagnosis of Transients in Smart Grids.
IEEE Trans. Cloud Comput., 2023

A Genetic Algorithm-Enhanced Sensor Marks Selection Algorithm for Wavefront Aberration Modeling in Extreme-UV (EUV) Photolithography.
Inf., 2023

Data-Driven Analytics for Reliability in the Buildings-to-Grid Integrated System Framework: A Systematic Text-Mining-Assisted Literature Review and Trend Analysis.
IEEE Access, 2023

Hardware Accelerators based on wavelets for detection of Transient phenomena in smart grids.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

2022
Cloud-Edge Interoperability for Demand Response-Enabled Fast Frequency Response Service Provision.
IEEE Trans. Cloud Comput., 2022

Deep Reinforcement Learning Acceleration for Real-Time Edge Computing Mixed Integer Programming Problems.
IEEE Access, 2022

Sampling Points Selection Algorithm For Advanced Photolithography Process.
Proceedings of the 7th South-East Europe Design Automation, 2022

2021
Real-Time Transient State Estimation in Smart Grids Utilizing Industrial loT Data.
Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

A Prototype 5G/IoT Implementation for Transforming a Legacy Facility to a Smart Factory.
Proceedings of the Artificial Intelligence Applications and Innovations. AIAI 2021 IFIP WG 12.5 International Workshops, 2021

2020
A Hybrid Cyber Physical Digital Twin Approach for Smart Grid Fault Prediction.
Proceedings of the IEEE Conference on Industrial Cyberphysical Systems, 2020

2018
Computationally efficient representation of energy grid-cyber physical system.
Proceedings of the IEEE Industrial Cyber-Physical Systems, 2018

FPGA-Assisted Distribution Grid Simulator.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2016
A Capacitive-to-Digital Converter With Automatic Range Adaptation for Readout Instrumentation.
IEEE Trans. Instrum. Meas., 2016

2014
A biosensor readout circuit with 3fF resolution and broad configurable range.
Proceedings of the 4th International Conference on Wireless Mobile Communication and Healthcare: "Transforming healthcare through innovations in mobile and wireless technologies", 2014

2011
A 60-GHz quadrature PLL in 90nm CMOS.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Next generation millimeter wave backhaul radio: Overall system design for GbE 60GHz PtP wireless radio of high CMOS integration.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
An ultra low area asynchronous combo 4/8/12-bit/quaternary A/D converter based on integer division.
Microelectron. J., 2010

Selecting appropriate calibration points for an ultra low area 8-bit subrange ADC.
Proceedings of the 8th Workshop on Intelligent Solutions in Embedded Systems, 2010

An 8-Bit Voltage Mode Analog to Digital Converter Based on Integer Division.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009
Analogue current quantizer architectures for implementing integer division-like functions.
Proceedings of the 16th International Conference on Digital Signal Processing, 2009

Asynchronous Combo 4/8/12bit, 140MS/s, 0.12mm<sup>2</sup> ADC with Binary Tree Structure.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2009

Calibration Method for a CMOS 0.06mm<sup>2</sup> 150MS/s 8-bit ADC.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Use of interleaving and error correction to infrared patterns for the improvement of position estimation systems.
Proceedings of 13th IEEE International Conference on Emerging Technologies and Factory Automation, 2008

2005
Heterogeneous system level co-simulation for the design of telecommunication systems.
J. Syst. Archit., 2005

2004
A Heterogeneous Co-simulation Environment for Complex Embedded Telecommunication Systems.
Proceedings of the Forum on specification and Design Languages, 2004

2003
Hardware/Software Co-Design of Complex Embedded Systems: An Approach Using Efficient Process Models, Multiple Formalism Specification and Validation via Co-Simulation.
Des. Autom. Embed. Syst., 2003

2001
A mapping algorithm for computer-assisted exploration in the design of embedded systems.
ACM Trans. Design Autom. Electr. Syst., 2001

High-level co-simulation based on the extension of processor simulators.
J. Syst. Archit., 2001

2000
Compensating for moderate effective throughput at the desktop.
IEEE Commun. Mag., 2000

Task Concurrency Management Experiment for Power-Efficient Speed-up of Embedded MPEG4 IM1 Player.
Proceedings of the 2000 International Workshop on Parallel Processing, 2000

1999
Application of a multi-formalism co-design methodology for the development of complex telecommunication protocols.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Hardware-software co-design of embedded systems using CoWare's N2C methodology for application development.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998
Simulating Hardware, Software and Electromechanical Parts Using Communicating Simulators.
Des. Autom. Embed. Syst., 1998

Reusable Architecture Templates and Automatic Specification Mapping for the Efficient Implementation of ATM Protocols.
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998

Hardware - Software Co-design of embedded telecommunication systems using multiple formalisms for application development.
Proceedings of the Formal Description Techniques and Protocol Specification, 1998

1996
Object oriented prototyping at the system level: an image reconstruction application example.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996

A formal approach to HW/SW co-design: the INSYDE project.
Proceedings of the IEEE Symposium and Workshop on Engineering of Computer Based Systems (ECBS'96), 1996

1995
A single-chip optical sensor with analog memory for motion detection.
IEEE J. Solid State Circuits, July, 1995

1994
Hardware programming using C++.
Microprocess. Microprogramming, 1994

A reconfigurable DSP board based on CORDIC elements.
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994

Near-Lossless Compression of Continuous-Tone Still Images Using Fuzzy Logic Notions and the Binary Arithmetic Coder (Q-Coder).
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A CAD Tool for the Development of an Extra-Fast Fuzzy Logic Controller Based on FPGAs and Memory Modules.
Proceedings of the Field-Programmable Logic, 1994


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