Francisco J. Andujar

Orcid: 0000-0001-8884-7334

According to our database1, Francisco J. Andujar authored at least 31 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Supporting efficient overlapping of host-device operations for heterogeneous programming with CtrlEvents.
J. Parallel Distributed Comput., September, 2023

Extending the VEF traces framework to model data center network workloads.
J. Supercomput., 2023

Energy efficient HPC network topologies with on/off links.
Future Gener. Comput. Syst., 2023

Open SYCL on heterogeneous GPU systems: A case of study.
CoRR, 2023

2022
Providing quality of service in omni-path networks.
J. Supercomput., 2022

2021
Enabling Quality of Service Provision in Omni-Path Switches.
Comput. Math. Methods, November, 2021

Efficient heterogeneous programming with FPGAs using the Controller model.
J. Supercomput., 2021

A methodology to enable QoS provision on InfiniBand hardware.
J. Supercomput., 2021

QoS provision in hierarchical and non-hierarchical switch architectures.
J. Parallel Distributed Comput., 2021

2019
POWAR: Power-Aware Routing in HPC Networks with On/Off Links.
ACM Trans. Archit. Code Optim., 2019

Speeding up exascale interconnection network simulations with the VEF3 trace framework.
J. Parallel Distributed Comput., 2019

Energy efficient torus networks with on/off links.
J. Parallel Distributed Comput., 2019

Constructing virtual 5-dimensional tori out of lower-dimensional network cards.
Concurr. Comput. Pract. Exp., 2019

2018
VEF3 Traces: Towards a Complete Framework for Modelling Network Workloads for Exascale Systems.
Proceedings of the 4th IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era, 2018

Analyzing Topology Parameters for Achieving Energy-Efficient k-ary n-cubes.
Proceedings of the 4th IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era, 2018

2017
Applying search algorithms to obtain the optimal configuration of nDT torus nodes.
Concurr. Comput. Pract. Exp., 2017

A Case Study on Implementing Virtual 5D Torus Networks Using Network Components of Lower Dimensionality.
Proceedings of the 3rd IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era, 2017

2016
An open-source family of tools to reproduce MPI-based workloads in interconnection network simulators.
J. Supercomput., 2016

Adaptive Routing for N-Dimensional Twin Torus.
IEEE Trans. Computers, 2016

2015
Optimizing the configuration of combined high-radix switches.
J. Supercomput., 2015

N-Dimensional Twin Torus Topology.
IEEE Trans. Computers, 2015

VEF Traces: A Framework for Modelling MPI Traffic in Interconnection Network Simulators.
Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015

2014
Formalization and configuration methodology for high-radix combined switches.
J. Supercomput., 2014

Building 3D Torus Using Low-Profile Expansion Cards.
IEEE Trans. Computers, 2014

Optimal Configuration for N-Dimensional Twin Torus Networks.
Proceedings of the 2014 IEEE 13th International Symposium on Network Computing and Applications, 2014

Deadlock-free routing mechanism for 3D twin torus networks.
Proceedings of the 8th International Workshop on Interconnection Network Architecture, 2014

2013
Obtaining the optimal configuration of high-radix Combined switches.
J. Parallel Distributed Comput., 2013

2012
Optimal Configuration of High-Radix Combined Switches.
Proceedings of the 20th Euromicro International Conference on Parallel, 2012

2011
Evaluation of an Alternative for Increasing Switch Radix.
Proceedings of The Tenth IEEE International Symposium on Networking Computing and Applications, 2011

Self-related traces: An alternative to full-system simulation for NoCs.
Proceedings of the 2011 International Conference on High Performance Computing & Simulation, 2011

C-Switches: Increasing Switch Radix with Current Integration Scale.
Proceedings of the 13th IEEE International Conference on High Performance Computing & Communication, 2011


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