Frank E. van Vliet

According to our database1, Frank E. van Vliet authored at least 20 papers between 2009 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
Hardware Implementation Overhead of Switchable Matching Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion.
IEEE J. Solid State Circuits, 2017

2015
On the Minimum Number of States for Switchable Matching Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Analysis of the Signal Transfer and Folding in N-Path Filters With a Series Inductance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Compact Cascadable g m -C All-Pass True Time Delay Cell With Reduced Delay Variation Over Frequency.
IEEE J. Solid State Circuits, 2015

2014
A 4-Element Phased-Array System With Simultaneous Spatial- and Frequency-Domain Filtering at the Antenna Inputs.
IEEE J. Solid State Circuits, 2014

3.5 A 1.0-to-2.5GHz beamforming receiver with constant-Gm vector modulator consuming.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering.
Proceedings of the ESSCIRC 2014, 2014

2013
Frequency Limitations of First-Order g<sub>m</sub> - RC All-Pass Delay Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

A 10 Watt S-Band MMIC Power Amplifier With Integrated 100 MHz Switch-Mode Power Supply and Control Circuitry for Active Electronically Scanned Arrays.
IEEE J. Solid State Circuits, 2013

Simultaneous spatial and frequency-domain filtering at the antenna inputs achieving up to +10dBm out-of-band/beam P1dB.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 1-to-2.5GHz phased-array IC based on gm-RC all-pass time-delay cells.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

The Impact of IPv6 on Penetration Testing.
Proceedings of the Information and Communication Technologies, 2012

2011
Spatial Interferer Rejection in a Four-Element Beamforming Receiver Front-End With a Switched-Capacitor Vector Modulator.
IEEE J. Solid State Circuits, 2011

A 1.0-to-4.0GHz 65nm CMOS four-element beamforming receiver using a switched-capacitor vector modulator with approximate sine weighting via charge redistribution.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Unified Frequency-Domain Analysis of Switched-Series- RC Passive Mixers and Samplers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Time delay circuits: A quality criterion for delay variations versus frequency.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A Labeled Data Set for Flow-Based Intrusion Detection.
Proceedings of the IP Operations and Management, 9th IEEE International Workshop, 2009


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