Eric A. M. Klumperink
Orcid: 0000-0003-2487-8996
According to our database1,
Eric A. M. Klumperink
authored at least 132 papers
between 1996 and 2023.
Collaborative distances:
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Bibliography
2023
A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation.
IEEE J. Solid State Circuits, 2023
2022
Figures of Merit for CMOS Low-Noise Amplifiers and Estimates for Their Theoretical Limits.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× Voltage Gain.
IEEE J. Solid State Circuits, 2022
2021
Power Efficiency Model for MIMO Transmitters Including Memory Polynomial Digital Predistortion.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Simplified Harmonic Rejection Mixer Analysis and Design Based on a Filtered Periodic Impulse Model.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter.
IEEE J. Solid State Circuits, 2021
A 0.7-5.7 GHz Reconfigurable MIMO Receiver Architecture for Analog Spatial Notch Filtering Using Orthogonal Beamforming.
IEEE J. Solid State Circuits, 2021
2020
Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Low-Power Highly Selective Channel Filtering Using a Transconductor-Capacitor Analog FIR.
IEEE J. Solid State Circuits, 2020
A Fully Passive RF Front End With 13-dB Gain Exploiting Implicit Capacitive Stacking in a Bottom-Plate N-Path Filter/Mixer.
IEEE J. Solid State Circuits, 2020
EVM-based Performance Evaluation of Co-channel Interference Mitigation using Spatial Filtering for Digital MIMO Receivers.
Proceedings of the 92nd IEEE Vehicular Technology Conference, 2020
30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Improving Receiver Close-In Blocker Tolerance by Baseband G<sub>m</sub>-C Notch Filtering.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
High-Linearity Bottom-Plate Mixing Technique With Switch Sharing for N-path Filters/Mixers.
IEEE J. Solid State Circuits, 2019
A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
A Wideband IF Receiver Module for Flexibly Scalable mmWave Beamforming Combining and Interference Cancellation.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Generalized Analysis of High-Order Switch-RC N-Path Mixers/Filters Using the Adjoint Network.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Analysis of the Effect of Source Capacitance and Inductance on $N$ -Path Mixers and Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Enhanced-Selectivity High-Linearity Low-Noise Mixer-First Receiver With Complex Pole Pair Due to Capacitive Positive Feedback.
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
2017
Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion.
IEEE J. Solid State Circuits, 2017
24.3 A high-linearity CMOS receiver achieving +44dBm IIP3 and +13dBm B1dB for SAW-less LTE radio.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
A digital sine-weighted switched-Gm mixer for single-clock power-scalable parallel receivers.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
Analysis of the Signal Transfer and Folding in N-Path Filters With a Series Inductance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
RF Transconductor Linearization Robust to Process, Voltage and Temperature Variations.
IEEE J. Solid State Circuits, 2015
IEEE J. Solid State Circuits, 2015
Compact Cascadable g m -C All-Pass True Time Delay Cell With Reduced Delay Variation Over Frequency.
IEEE J. Solid State Circuits, 2015
An In-Band Full-Duplex Radio Receiver With a Passive Vector Modulator Downmixer for Self-Interference Cancellation.
IEEE J. Solid State Circuits, 2015
5.5 A forward-body-bias tuned 450MHz Gm-C 3<sup>rd</sup>-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
19.2 A self-interference-cancelling receiver for in-band full-duplex wireless with low distortion under cancellation of strong TX leakage.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the ESSCIRC Conference 2015, 2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
A 100-800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving <-40 dBc for ALL Harmonics.
IEEE J. Solid State Circuits, 2014
Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity".
IEEE J. Solid State Circuits, 2014
Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity.
IEEE J. Solid State Circuits, 2014
A 4-Element Phased-Array System With Simultaneous Spatial- and Frequency-Domain Filtering at the Antenna Inputs.
IEEE J. Solid State Circuits, 2014
IEEE J. Sel. Areas Commun., 2014
Int. J. Circuit Theory Appl., 2014
An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
IEEE Commun. Mag., 2014
3.5 A 1.0-to-2.5GHz beamforming receiver with constant-Gm vector modulator consuming.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering.
Proceedings of the ESSCIRC 2014, 2014
Proceedings of the 9th International Conference on Cognitive Radio Oriented Wireless Networks and Communications, 2014
RF transconductor linearization technique robust to process, voltage and temperature variations.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
IEEE J. Solid State Circuits, 2013
Spectrum Sensing With High Sensitivity and Interferer Robustness Using Cross-Correlation Energy Detection.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Simultaneous spatial and frequency-domain filtering at the antenna inputs achieving up to +10dBm out-of-band/beam P1dB.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
A CMOS-Compatible Spectrum Analyzer for Cognitive Radio Exploiting Crosscorrelation to Improve Linearity and Noise Performance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Widely Tunable 4th Order Switched G<sub>m</sub>-C Band-Pass Filter Based on N-Path Filters.
IEEE J. Solid State Circuits, 2012
A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 0.3-to-1.2GHz tunable 4<sup>th</sup>-order switched gm-C bandpass filter with >55dB ultimate rejection and out-of-band IIP3 of +29dBm.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
2011
IEEE Trans. Veh. Technol., 2011
Spatial Interferer Rejection in a Four-Element Beamforming Receiver Front-End With a Switched-Capacitor Vector Modulator.
IEEE J. Solid State Circuits, 2011
IEEE J. Solid State Circuits, 2011
Proceedings of the 74th IEEE Vehicular Technology Conference, 2011
A 1.0-to-4.0GHz 65nm CMOS four-element beamforming receiver using a switched-capacitor vector modulator with approximate sine weighting via charge redistribution.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Unified Frequency-Domain Analysis of Switched-Series- RC Passive Mixers and Samplers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A 300-800 MHz Tunable Filter and Linearized LNA Applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver.
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects.
IEEE J. Solid State Circuits, 2010
Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector.
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
Optimized Stage Ratio of Tapered CMOS Inverters for Minimum Power and Mismatch Jitter Product.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference.
IEEE J. Solid State Circuits, 2009
A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by N<sup>2</sup>.
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A 400-to-900 MHz receiver with dual-domain harmonic rejection exploiting adaptive interference cancellation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A 2.2GHz 7.6mW sub-sampling PLL with -126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2008
A Two-Stage Approach to Harmonic Rejection Mixing Using Blind Interference Cancellation.
IEEE Trans. Circuits Syst. II Express Briefs, 2008
Theoretical Analysis of Highly Linear Tunable Filters Using Switched-Resistor Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation.
IEEE Trans. Circuits Syst. II Express Briefs, 2008
IEEE J. Solid State Circuits, 2008
Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling.
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE J. Solid State Circuits, 2007
Cognitive radios for dynamic spectrum access - polyphase multipath radio circuits for dynamic spectrum access.
IEEE Commun. Mag., 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
IEEE J. Solid State Circuits, 2006
Pulse-width modulation pre-emphasis applied in a wireline transmitter, achieving 33 dB loss compensation at 5-Gb/s in 0.13-μm CMOS.
IEEE J. Solid State Circuits, 2006
A 3-Gb/s/ch transceiver for 10-mm uninterrupted RC-limited global on-chip interconnects.
IEEE J. Solid State Circuits, 2006
A multipath technique for canceling harmonics and sidebands in a wideband power upconverter.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
IEEE J. Solid State Circuits, 2004
IEEE J. Solid State Circuits, 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
2003
IEEE Trans. Circuits Syst. II Express Briefs, 2003
2001
IEEE J. Solid State Circuits, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
IEEE J. Solid State Circuits, 2000
1999
Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators.
IEEE J. Solid State Circuits, 1999
1996
IEEE J. Solid State Circuits, 1996