Fumito Imura

Orcid: 0000-0001-7565-260X

According to our database1, Fumito Imura authored at least 4 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
Packaging in minimal fab: An integrated semiconductor line from wafer process to packaging process.
Proceedings of the International Conference on IC Design and Technology, 2016

2015
Impact of die thinning on the thermal performance of a central TSV bus in a 3D stacked circuit.
Microelectron. J., 2015

2012
Cool System scalable 3-D stacked heterogeneous Multi-Core / Multi-Chip architecture for ultra low-power digital TV applications.
Proceedings of the 2012 IEEE Symposium on Low-Power and High-Speed Chips, 2012

2011
COOL interconnect low power interconnection technology for scalable 3D LSI design.
Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011


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